PIC18F2410-E/ML Microchip Technology, PIC18F2410-E/ML Datasheet - Page 92

• Manufacturer Part Number: PIC18F2410-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2410-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Data Ram Size: 768 B
• On-chip Adc: 10 bit
• Number Of Programmable I/os: 25
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Mounting Style: SMD/SMT
• Height: 0.88 mm
• Interface Type: EUSART, I2C, MSSP, SPI
• Length: 6 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 6 mm
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F2X1X/4X1X
8.5
The RCON register contains flag bits which are used to
determine the cause of the last Reset or wake-up from
Idle or Sleep modes. RCON also contains the IPEN bit
which enables interrupt priorities.
REGISTER 8-10:
DS39636D-page 94
RCON Register
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
RCON REGISTER
bit 7
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (PIC16XXX Compatibility mode)
SBOREN: Software BOR Enable bit
For details of bit operation, see Register 4-1.
Unimplemented: Read as ‘0’
RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-1.
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-1.
PD: Power-down Detection Flag bit
For details of bit operation, see Register 4-1.
POR: Power-on Reset Status bit
For details of bit operation, see Register 4-1.
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-1.
Legend:
R = Readable bit
-n = Value at POR
R/W-0
IPEN
Note 1: Actual Reset values are determined by device configuration and the nature of the
device Reset. See Register 4-1 for additional information.
SBOREN
R/W-1
(1)
W = Writable bit
‘1’ = Bit is set
U-0
—
(1)
R/W-1
The operation of the SBOREN bit and the Reset flag
bits is discussed in more detail in Section 4.1 “RCON
Register”.
RI
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
TO
R-1
PD
© 2009 Microchip Technology Inc.
R/W-0
POR
x = Bit is unknown
(1)
R/W-0
BOR
bit 0