PIC18F2410-E/ML Microchip Technology, PIC18F2410-E/ML Datasheet - Page 244

• Manufacturer Part Number: PIC18F2410-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2410-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Data Ram Size: 768 B
• On-chip Adc: 10 bit
• Number Of Programmable I/os: 25
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Mounting Style: SMD/SMT
• Height: 0.88 mm
• Interface Type: EUSART, I2C, MSSP, SPI
• Length: 6 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 6 mm
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PIC18F2X1X/4X1X
REGISTER 22-10: CONFIG7L: CONFIGURATION REGISTER 7 LOW (BYTE ADDRESS 30000Ch)
REGISTER 22-11: CONFIG7H: CONFIGURATION REGISTER 7 HIGH (BYTE ADDRESS 30000Dh)
DS39636D-page 246
bit 7
bit 6
bit 5-0
bit 7-4
bit 3
bit 2
bit 1
bit 0
bit 7
Unimplemented: Read as ‘0’
EBTRB: Boot Block Table Read Protection bit
1 = Boot block (000000-0007FFh) not protected from table reads executed in other blocks
0 = Boot block (000000-0007FFh) protected from table reads executed in other blocks
Unimplemented: Read as ‘0’
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
Unimplemented: Read as ‘0’
EBTR3: Table Read Protection bit
1 = Block 3 (006000-007FFFh) not protected from table reads executed in other blocks
0 = Block 3 (006000-007FFFh) protected from table reads executed in other blocks
1 = Block 3 (00C000-00FFFFh) not protected from table reads executed in other blocks
0 = Block 3 (00C000-00FFFFh) protected from table reads executed in other blocks
EBTR2: Table Read Protection bit
1 = Block 2 (004000-005FFFh) not protected from table reads executed in other blocks
0 = Block 2 (004000-005FFFh) protected from table reads executed in other blocks
1 = Block 2 (008000-00BFFFh) not protected from table reads executed in other blocks
0 = Block 2 (008000-00BFFFh) protected from table reads executed in other blocks
EBTR1: Table Read Protection bit
1 = Block 1 (002000-003FFFh) not protected from table reads executed in other blocks
0 = Block 1 (002000-003FFFh) protected from table reads executed in other blocks
1 = Block 1 (004000-007FFFh) not protected from table reads executed in other blocks
0 = Block 1 (004000-007FFFh) protected from table reads executed in other blocks
EBTR0: Table Read Protection bit
1 = Block 0 (000800-001FFFh) not protected from table reads executed in other blocks
0 = Block 0 (000800-001FFFh) protected from table reads executed in other blocks
1 = Block 0 (000800-003FFFh) not protected from table reads executed in other blocks
0 = Block 0 (000800-003FFFh) protected from table reads executed in other blocks
Legend:
R = Readable bit
-n = Value when device is unprogrammed
Note 1: Unimplemented in PIC18F2410/4410 devices; maintain this bit set.
U-0
U-0
—
—
2: Unimplemented in PIC18F2515/4515 devices; maintain this bit set.
3: Address range for 16K and 32K devices.
4: Address range for 48K and 64K devices.
EBTRB
R/C-1
U-0
—
C = Clearable bit
C = Clearable bit
U-0
—
U-0
—
(1)
(1,2)
U-0
—
U-0
—
EBTR3
R/C-1
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U-0
—
(1,2)
EBTR2
R/C-1
U-0
—
© 2009 Microchip Technology Inc.
(1)
EBTR1
R/C-1
U-0
—
(3)
(3)
(3)
(4)
(3)
(4)
(4)
(4)
EBTR0
R/C-1
U-0
(3)
(3)
(3)
(4)
(3)
(4)
(4)
(4)
—
bit 0
bit 0