PIC18F2410-E/ML Microchip Technology, PIC18F2410-E/ML Datasheet - Page 303

• Manufacturer Part Number: PIC18F2410-E/ML
• Description: IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F2410-E/ML

• Rohs Compliant: YES
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Core: PIC
• Processor Series: PIC18F
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Data Ram Size: 768 B
• On-chip Adc: 10 bit
• Number Of Programmable I/os: 25
• Number Of Timers: 1 x 8
• Operating Supply Voltage: 4.2 V to 5.5 V
• Mounting Style: SMD/SMT
• Height: 0.88 mm
• Interface Type: EUSART, I2C, MSSP, SPI
• Length: 6 mm
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 4.2 V
• Width: 6 mm
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

SUBFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
© 2009 Microchip Technology Inc.
Q Cycle Activity:
Before Instruction
After Instruction
Decode
FSR2
FSR2
Q1
=
=
register ‘f’
Subtract Literal from FSR
SUBFSR f, k
0 ≤ k ≤ 63
f ∈ [ 0, 1, 2 ]
FSR(f) – k → FSRf
None
The 6-bit literal ‘k’ is subtracted from
the contents of the FSR specified by
‘f’.
1
1
SUBFSR 2, 23h
Read
1110
Q2
03FFh
03DCh
1001
Process
Data
Q3
ffkk
destination
Write to
kkkk
Q4
SUBULNK
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Operation
PIC18F2X1X/4X1X
Decode
No
FSR2
PC
FSR2
PC
Q1
Subtract Literal from FSR2 and Return
SUBULNK k
0 ≤ k ≤ 63
FSR2 – k → FSR2
(TOS) → PC
The 6-bit literal ‘k’ is subtracted from the
contents of the FSR2. A RETURN is then
executed by loading the PC with the TOS.
The instruction takes two cycles to
execute; a NOP is performed during the
second cycle.
This may be thought of as a special case of
the SUBFSR instruction, where f = 3 (binary
‘11’); it operates only on FSR2.
1
2
1110
=
=
=
=
Operation
register ‘f’
SUBULNK 23h
Read
No
Q2
03FFh
0100h
03DCh
(TOS)
1001
Operation
Process
Data
No
Q3
DS39636D-page 305
11kk
destination
Operation
Write to
kkkk
No
Q4