LSM303DLHTR STMicroelectronics, LSM303DLHTR Datasheet
LSM303DLHTR
Specifications of LSM303DLHTR
LSM303DLHTR
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LSM303DLHTR Summary of contents
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... The LSM303DLH is available in a plastic land grid array (LGA) package, and is guaranteed to operate over an extended temperature range from -30 to +85 °C. Table 1. Part number LSM303DLH LSM303DLHTR Doc ID 16941 Rev 1 LSM303DLH Sensor module: LGA-28L (5x5x1.0 mm serial bus interface Device summary Temp ...
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Contents Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1 Block ...
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LSM303DLH 7.1.2 7.1.3 8 Register mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Contents 10 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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LSM303DLH List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 49. Interrupt mode configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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LSM303DLH List of figures Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Block diagram and pin description 1 Block diagram and pin description 1.1 Block diagram Figure 1. Block diagram 8/47 Doc ID 16941 Rev 1 LSM303DLH ...
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LSM303DLH 1.2 Pin description Figure 2. Pin connection Block diagram and pin description Doc ID 16941 Rev 1 9/47 ...
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Block diagram and pin description Table 2. Pin description Pin 10/47 Name ...
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LSM303DLH 2 Module specifications 2.1 Mechanical characteristics @ Vdd = 2 °C unless otherwise noted Table 3. Mechanical characteristics Symbol Parameter Linear acceleration LA_FS measurement range M_FS Magnetic measurement range LA_So Linear acceleration sensitivity M_GN Magnetic ...
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Module specifications Table 3. Mechanical characteristics (continued) Symbol Parameter Linear acceleration sensitivity LA_TCSo change vs. temperature Linear acceleration typical LA_TyOff zero-g level offset (3),(4) accuracy Linear acceleration zero-g level LA_TCOff change vs temperature LA_An Acceleration noise density Linear acceleration self-test ...
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LSM303DLH 2.2 Electrical characteristics @ Vdd = 2 °C unless otherwise noted. Table 4. Electrical characteristics Symbol Parameter Vdd Supply voltage Accelerometer module power Vdd_IO_A supply for I/O Magnetic module digital power Vdd_dig_M supply Magnetic module ...
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Module specifications 2.3 Communication interface characteristics 2.3.1 Accelerometer sensor I Subject to general operating conditions for Vdd and top. 2 Table slave timing values Symbol Parameter f SCL clock frequency (SCL) t SCL clock low time w(SCLL) ...
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LSM303DLH 2.3.2 Magnetic field sensing I This magnetic sensor IC has a 7-bit serial address and supports I and fast modes (100 kHz and 400 kHz, respectively), but does not support high-speed mode (Hs). External pull-up resistors are required to ...
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Absolute maximum ratings 3 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device under these conditions is not implied. ...
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LSM303DLH 4 Terminology 4.1 Linear acceleration sensitivity Linear acceleration sensitivity describes the gain of the accelerometer sensor and can be determined e.g. by applying 1 g acceleration to it. Because the sensor can measure DC accelerations, this can be done ...
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Functionality 5 Functionality The LSM303DLH is a system-in-package featuring a 3D digital linear acceleration and 3D digital magnetic field detection sensor. The system includes specific sensing elements and an IC interfaces capable of measuring both the linear acceleration and magnetic ...
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LSM303DLH By placing the mode register into single-conversion mode (0x01), two data acquisition cycles are made on each magnetic vector. The first acquisition is a set pulse followed shortly by measurement data of the external field. The second acquisition has ...
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Application hints 6 Application hints Figure 4. LSM303DLH electrical connection 1 - recommended for I Figure 5. LSM303DLH electrical connection 2 20/47 Doc ID 16941 Rev 1 LSM303DLH 2 C fast mode ...
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LSM303DLH 6.1 External capacitors The C1 and C2 external capacitors should have a low SR value ceramic type construction. Reservoir capacitor C1 is nominally 4.7 µF in capacitance, with the set/reset capacitor C2 nominally 0.22 µF in capacitance. The device ...
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Application hints 6.5 High current wiring effects High current in wiring and printed circuit traces can be the cause of errors in magnetic field measurements for compassing. Conducto-generated magnetic fields add to earth’s magnetic field, creating errors in compass heading ...
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LSM303DLH 7 Digital interfaces The registers embedded inside the LSM303DLH are accessible through two separate I serial interfaces: one for the accelerometer core and the other for the magnetometer core. The two interfaces can be connected together on the PCB. ...
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Digital interfaces 2 7.1 operation The transaction on the bus is started through a START (ST) signal. A START condition is defined as a HIGH to LOW transition on the data line while the SCL line is held ...
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LSM303DLH 7.1.2 Linear acceleration digital interface For linear acceleration, the default (factory) 7-bit slave address is 001100xb. The SDO/SA0 pad can be used to modify the least significant bit of the device address. If the SA0 pad is connected to ...
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Digital interfaces The SCL_M and SDA_M lines in this bus specification can be connected to a host of devices. The bus can be a single master to multiple slaves can be a multiple master configuration. All data transfers ...
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LSM303DLH 8 Register mapping The tables given below provide a listing of the 8-bit registers embedded in the device and the related addresses: Table 17. Register address map Name address Reserved (do not modify) CTRL_REG1_A TAB.13 CTRL_REG2_A TAB.13 CTRL_REG3_A TAB.13 ...
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Register mapping Table 17. Register address map (continued) Name address OUT_X_L_M TAB.15 OUT_Y_H_M TAB.15 OUT_Y_L_M TAB.15 OUT_Z_H_M TAB.15 OUT_Z_L_M TAB.15 SR_REG_Mg TAB.15 IRA_REG_M TAB.15 IRB_REG_M TAB.15 IRC_REG_M TAB.15 Registers marked as Reserved must not be changed. Writing to these registers ...
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LSM303DLH 9 Registers description The device contains a set of registers which are used to control its behavior and to retrieve acceleration data. The register address, composed of 7 bits, is used to identify them and to write the data ...
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Registers description Table 20. Power mode and low-power output data rate configurations (continued) PM2 PM1 Table 21. Normal-mode output data rate configurations and low-pass cut-off frequencies DR1 9.1.2 CTRL_REG2_A (21h) Table ...
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LSM303DLH internal registers related to trimming functions to permit good device behavior. If, for any reason, the content of the trimming registers was changed sufficient to use this bit to restore the correct values. When the BOOT bit ...
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Registers description Table 27. CTRL_REG3_A description Interrupt active high, low. Default value: 0 IHL (0: active high; 1:active low) Push-pull/open drain selection on interrupt pad. Default value 0. PP_OD (0: push-pull; 1: open drain) Latch interrupt request on INT2_SRC register, ...
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LSM303DLH The BDU bit is used to inhibit output register updates between the reading of the upper and lower register parts. In default mode (BDU = ‘0’), the lower and upper register parts are updated continuously not ...
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Registers description This register sets the acceleration value taken as a reference for the high-pass filter output. When the filter is turned on (at least one FDS, HPen2, or HPen1 bit is equal to ‘1’) and HPM bits are set ...
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LSM303DLH 9.1.12 INT1_CFG_A (30h) Table 38. INT1_CFG_A register AOI 6D Table 39. INT1_CFG_A description AND/OR combination of interrupt events. Default value: 0. AOI (See 6 direction detection function enable. Default value (See Enable interrupt generation on Z high ...
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Registers description 9.1.13 INT1_SRC_A (31h) Table 41. INT1_SRC register 0 IA Table 42. INT1_SRC_A description Interrupt active. Default value (0: no interrupt has been generated; 1: one or more interrupts have been generated) Z high. Default value: 0 ...
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LSM303DLH The bits set the minimum duration of the Interrupt 2 event to be recognized. Duration steps and maximum values depend on the ODR chosen. 9.1.16 INT2_CFG_A (34h) Table 47. INT2_CFG_A register AOI 6D Table 48. INT2_CFG_A ...
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Registers description 9.1.17 INT2_SRC_A (35h) Table 50. INT2_SRC_A register 0 IA Table 51. INT2_SRC_A description Interrupt active. Default value (0: no interrupt has been generated; 1: one or more interrupts have been generated) Z high. Default value: 0 ...
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LSM303DLH The bits set the minimum duration of the Interrupt 2 event to be recognized. Duration time steps and maximum values depend on the ODR chosen. 9.2 Magnetic field sensing register description The magnetometer core contains a ...
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Registers description Table 59. CRA_REG_M description MS1 MS0 9.2.2 CRB_REG_M (01h) The configuration register B for setting the device gain. CRB0 through CRB7 indicate bit locations, with CRB denoting the bits that ...
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LSM303DLH the first bit of the data stream. The number in parentheses indicates the default value of that bit. Table 63. MR_REG 0 0 Table 64. MR_REG description MR7 to MR2 These bits must be cleared for correct operation MR1 ...
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Registers description Table 67. OUTXL_M register DXRL7 DXRL6 The content of this register is the LSB magnetic field data for X-axis. 9.2.5 OUT_Y_M (05-06h) The data output Y registers are two 8-bit registers, data output register H and data output ...
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LSM303DLH impacts DRDY and RDY, which cannot be cleared until new data is placed in all the output registers. Status register The status register (SR 8-bit read-only register. This register is used to indicate device status. SR0 through ...
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Registers description Table 76. IRC_REG_M 0 0 44/ Doc ID 16941 Rev 1 LSM303DLH ...
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LSM303DLH 10 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK ...
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Revision history 11 Revision history Table 77. Document revision history Date 18-Dec-2009 46/47 Revision 1 First issue. Doc ID 16941 Rev 1 LSM303DLH Changes ...
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... LSM303DLH Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...