LSM303DLHTR STMicroelectronics, LSM303DLHTR Datasheet - Page 32

• Manufacturer Part Number: LSM303DLHTR
• Description: IC ACCELEROMETER 3AXIS 3D 28LGA
• Manufacturer: STMicroelectronics

Specifications of LSM303DLHTR

• Output Type: Digital - I²C
• Sensor Type: Accelerometer and Magnetometer
• Sensing Axis: Triple
• Acceleration: 2 g, 4 g, 8 g
• Sensitivity: 1 mg/digit, 2 mg/digit, 3.9 mg/digit
• Package / Case: LGA-28L
• Digital Output - Number Of Bits: 16 bit
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 2.5 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 30 C
• Digital Output - Bus Interface: I2C
• For Use With: 497-10689 - BOARD ADAPTER LSM303DLH DIL24
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-10765-2; LSM303DLHTR

Registers description
9.1.4
32/47
Table 27.
Table 28.
CTRL_REG4_A (23h)
Table 29.
Table 30.
IHL
PP_OD
LIR2
I2_CFG1,
I2_CFG0
LIR1
I1_CFG1,
I1_CFG0
BDU
BLE
FS1, FS0
STsign
ST
BDU
I1(2)_CFG1
0
0
1
1
CTRL_REG3_A description
Data signal on INT 1 and INT 2 pad
CTRL_REG4_A register
CTRL_REG4_A description
Block data update. Default value: 0
(0: continuos update; 1: output registers not updated between MSB and LSB reading)
Big/little endian data selection. Default value 0.
(0: data LSB @ lower address; 1: data MSB @ lower address)
Full-scale selection. Default value: 00.
(00: ±2 g; 01: ±4 g; 11: ±8 g)
Self-test sign. Default value: 00.
(0: self-test plus; 1 self-test minus)
Self-test enable. Default value: 0.
(0: self-test disabled; 1: self-test enabled)
BLE
Interrupt active high, low. Default value: 0
(0: active high; 1:active low)
Push-pull/open drain selection on interrupt pad. Default value 0.
(0: push-pull; 1: open drain)
Latch interrupt request on INT2_SRC register, with INT2_SRC register cleared by
reading INT2_SRC itself. Default value: 0.
(0: interrupt request not latched; 1: interrupt request latched)
Data signal on INT 2 pad control bits. Default value: 00.
(see table below)
Latch interrupt request on INT1_SRC register, with INT1_SRC register cleared by
reading INT1_SRC register. Default value: 0.
(0: interrupt request not latched; 1: interrupt request latched)
Data signal on INT 1 pad control bits. Default value: 00.
(see table below)
FS1
I1(2)_CFG0
Doc ID 16941 Rev 1
0
1
0
1
FS0
STsign
Interrupt 1 source OR interrupt 2 source
Interrupt 1 (2) source
0
INT 1(2) Pad
Boot running
Data ready
ST
LSM303DLH
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