C40K-CDR-A Omron, C40K-CDR-A Datasheet - Page 125

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C40K-CDR-A

Manufacturer Part Number
C40K-CDR-A
Description
PROGRAMMABLE CONTROLLER CPU
Manufacturer
Omron
Datasheet

Specifications of C40K-CDR-A

Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
DATA COMPARE – CMP(20)
114
Address
0000
0001
0002
0003
0004
0005
0006
Instruction
LD
TIM
CMP(20)
AND
OUT
LD
CMP(20)
The branching structure of this diagram is important so that 0200, 0201, and
0202 are controlled properly as the timer counts down. Because all of the
comparisons here are to the timer’s PV, the other operand for each CMP(20)
must be in 4-digit BCD.
TIM 10
0000
0200
0201
#
TIM
#
TIM
#
Operands
1907
1907
1907
0000
0500
4000
1907
0200
0200
3000
10
10
10
Address
0007
0008
0009
0010
0011
0012
0013
0014
Instruction
AND
OUT
LD
CMP(20)
AND
OUT
LD
OUT
TIM
#
TIM
Operands
CMP(20)
CMP(20)
CMP(20)
#4000
TIM 10
TIM 10
TIM 10
TIM 10
#3000
#2000
1907
0201
0201
2000
1907
0202
0204
0500 s.
10
10
0200
0201
0202
0204
Section 5-14
Output at
100 s.
Output at
200 s.
Output at
300 s.
Output at
500 s.

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