C40K-CDR-A Omron, C40K-CDR-A Datasheet - Page 50
![no-image](/images/manufacturer_photos/0/4/494/omron_sml.jpg)
C40K-CDR-A
Manufacturer Part Number
C40K-CDR-A
Description
PROGRAMMABLE CONTROLLER CPU
Manufacturer
Omron
Datasheet
1.C28P-EDR-A.pdf
(225 pages)
Specifications of C40K-CDR-A
Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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The Ladder Diagram
38
0006
0005
LD
AND
0000
Block a
0007
0001
0000
0001
0001
OR
AND
AND NOT 0003
0003
0500
0002
OR LD
0002
0500
0002
0004
0003
Again, this diagram can be redrawn as follows to simplify program structure
and coding and to save memory space.
Our last example may at first appear very complicated but can be coded us-
ing only two logic block instructions. The diagram appears as follows:
The first logic block instruction is used to combine the execution conditions
resulting from blocks a and b, and the second one is used to combine the
execution condition of block c with the execution condition resulting from the
normally closed condition assigned 0003. The rest of the diagram can be
coded with ladder instructions. The logical flow for this and the resulting code
are shown below.
LD
AND
0100
AND LD
Block b
0105
0100
0101
0101
0000
0000
0100
0500
LD
AND
OR
0004
0006
Block c
0001
0101
0006
0004
0005
0005
Block b
Block a
0002
0105
0003
Address Instruction
0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
Address Instruction
0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
0004
0006
LD
AND
LD
AND
OR LD
OR
AND
AND NOT
LD
AND
OR
AND LD
OUT
LD
AND
OR
AND
AND
LD
AND
OR LD
AND
OUT
0005
Block c
Operands
Operands
Section 4-3
0105
0000
0001
0100
0101
0500
0002
0003
0004
0005
0006
0105
---
---
0006
0007
0005
0003
0004
0001
0002
0000
0105
---
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