C40K-CDR-A Omron, C40K-CDR-A Datasheet - Page 83

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C40K-CDR-A

Manufacturer Part Number
C40K-CDR-A
Description
PROGRAMMABLE CONTROLLER CPU
Manufacturer
Omron
Datasheet

Specifications of C40K-CDR-A

Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Areas, Definer Values, and Flags
72
Interlocks
0000
TR
0000
0
0005
0001
IL(02)
TR
1
0002
0003
0002
IL(02)
0001
If the condition assigned 0004 was not in the diagram, the second LD using
TR 0 would not be necessary because OUT with 0102 and the AND NOT
with 0005 both require the same execution condition, i.e., the execution con-
dition stored in TR 0. The diagram and mnemonic code for this program are
shown below.
When coding IL(02) and ILC(03), the mnemonic code will be the same re-
gardless of whether the instruction is drawn as branching instruction lines or
whether IL(02) is placed on its own instruction line. If drawn as branching
instruction lines, each branch line is coded as if it were connected to the bus
bar, i.e., the first condition on each branch line corresponds to a LD or LD
NOT instruction.
0003
0005
0006
0004
0102
ILC(03)
0100
0101
0103
0100
0101
0102
0103
Address Instruction
0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
0013
Address Instruction
0000
0001
0002
0003
0004
0005
0006
0007
0008
0009
0010
0011
0012
LD
IL(02)
LD
OUT
LD
IL(02)
LD
AND NOT
OUT
LD
OUT
LD
OUT
ILC(03)
LD
OUT
AND
OUT
AND
OUT
LD
AND
OUT
LD
OUT
AND NOT
OUT
TR
TR
TR
TR
Operands
Operands
Section 5-4
0000
0001
0100
0002
0003
0004
0101
0005
0102
0006
0103
0000
0001
0002
0100
0003
0101
0102
0005
0103
0
1
1
0

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