C40K-CDR-A Omron, C40K-CDR-A Datasheet - Page 164

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C40K-CDR-A

Manufacturer Part Number
C40K-CDR-A
Description
PROGRAMMABLE CONTROLLER CPU
Manufacturer
Omron
Datasheet

Specifications of C40K-CDR-A

Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Monitoring Operation and Modifying Data
7-3-2
Multiple Address Monitoring
Force Set/Reset
When the Bit/Digit Monitor operation is being performed and a bit, timer, or
counter address is leftmost on the display, PLAY/SET can be pressed to turn
ON the bit, start the timer, or increment the counter and REC/RESET can be
pressed to turn OFF the bit or reset the timer or counter. Timers will not oper-
ate in PROGRAM mode. SR bits cannot be turned ON and OFF with this op-
eration.
Bit status will remain ON or OFF for only one scan after pressing the key; it
will then return to its original status. When timers or counters are reset in
MONITOR mode, they will start after one scan.
This operation can be used in MONITOR mode to check wiring of outputs
from the PC prior to actual program execution. This operation cannot be
used in RUN mode.
Cancels monitoring of
leftmost address
Cancels Monitor
operation
Section 7-3
153

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