AC164139 Microchip Technology, AC164139 Datasheet - Page 227

Graphics Display Prototype Board Graphics

AC164139

Manufacturer Part Number
AC164139
Description
Graphics Display Prototype Board Graphics
Manufacturer
Microchip Technology
Datasheets

Specifications of AC164139

Main Purpose
LCD Development
Embedded
No
Utilized Ic / Part
PICtail™ Plus Board
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Secondary Attributes
-
Primary Attributes
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AC164139
Manufacturer:
Microchip Technology
Quantity:
135
REGISTER 16-1:
 2010 Microchip Technology Inc.
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
ACKDT: Acknowledge Data bit (when operating as I
Value that will be transmitted when the software initiates an Acknowledge sequence.
1 = Sends NACK during Acknowledge
0 = Sends ACK during Acknowledge
ACKEN: Acknowledge Sequence Enable bit (when operating as I
receive.)
1 = Initiates Acknowledge sequence on SDAx and SCLx pins and transmits the ACKDT data bit.
0 = Acknowledge sequence is not in progress
RCEN: Receive Enable bit (when operating as I
1 = Enables Receive mode for I
0 = Receive sequence is not in progress
PEN: Stop Condition Enable bit (when operating as I
1 = Initiates Stop condition on the SDAx and SCLx pins. Hardware is clear at the end of the master
0 = Stop condition is not in progress
RSEN: Repeated Start Condition Enabled bit (when operating as I
1 = Initiates Repeated Start condition on the SDAx and SCLx pins. Hardware is clear at the end of the
0 = Repeated Start condition is not in progress
SEN: Start Condition Enabled bit (when operating as I
1 = Initiates Start condition on SDAx and SCLx pins. Hardware is clear at end of the master Start
0 = Start condition is not in progress
Hardware is clear at the end of the master Acknowledge sequence.
data byte.
Stop sequence.
master Repeated Start sequence
sequence.
I2CxCON: I2Cx CONTROL REGISTER (CONTINUED)
PIC24FJ256DA210 FAMILY
2
C. Hardware is clear at the end of the eighth bit of the master receive
2
C master)
2
2
C master. Applicable during master receive.)
C master)
2
C master)
2
C master. Applicable during master
2
C master)
DS39969B-page 227

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