AC164139 Microchip Technology, AC164139 Datasheet - Page 231

• Manufacturer Part Number: AC164139
• Description: Graphics Display Prototype Board Graphics
• Manufacturer: Microchip Technology

Specifications of AC164139

• Main Purpose: LCD Development
• Embedded: No
• Utilized Ic / Part: PICtail™ Plus Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Secondary Attributes: -
• Primary Attributes: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.0
The Universal Asynchronous Receiver Transmitter
(UART) module is one of the serial I/O modules available
in the PIC24F device family. The UART is a full-duplex,
asynchronous system that can communicate with
peripheral devices, such as personal computers,
LIN/J2602, RS-232 and RS-485 interfaces. The module
also supports a hardware flow control option with the
UxCTS and UxRTS pins, and also includes an IrDA
encoder and decoder.
The primary features of the UART module are:
• Full-Duplex, 8 or 9-Bit data transmission through
• Even, Odd or No Parity options (for 8-bit data)
• One or two Stop bits
• Hardware Flow Control option with the UxCTS
FIGURE 17-1:
 2010 Microchip Technology Inc.
Note:
the UxTX and UxRX pins
and UxRTS pins
Note:
UNIVERSAL ASYNCHRONOUS
RECEIVER TRANSMITTER
(UART)
This data sheet summarizes the features
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information, refer to the
“PIC24F
Section 21. “UART” (DS39708). The
information in this data sheet supersedes
the information in the FRM.
The UART inputs and outputs must all be assigned to available RPn/RPIn pins before use. See Section 10.4
“Peripheral Pin Select (PPS)” for more information.
Family
UART SIMPLIFIED BLOCK DIAGRAM
Hardware Flow Control
Baud Rate Generator
UARTx Transmitter
UARTx Receiver
Reference
IrDA
®
Manual”,
PIC24FJ256DA210 FAMILY
®
• Fully Integrated Baud Rate Generator with 16-Bit
• Baud Rates Ranging from 15 bps to 1 Mbps at
• 4-Deep, First-In-First-Out (FIFO) Transmit Data
• 4-Deep FIFO Receive Data Buffer
• Parity, Framing and Buffer Overrun Error Detection
• Support for 9-bit mode with Address Detect
• Transmit and Receive Interrupts
• Loopback mode for Diagnostic Support
• Support for Sync and Break Characters
• Supports Automatic Baud Rate Detection
• IrDA
• 16x Baud Clock Output for IrDA Support
A simplified block diagram of the UART is shown in
Figure 17-1. The UART module consists of these key
important hardware elements:
• Baud Rate Generator
• Asynchronous Transmitter
• Asynchronous Receiver
Prescaler
16 MIPS
Buffer
(9
th
bit = 1)
®
Encoder and Decoder Logic
UxRX
UxCTS
UxRTS/BCLKx
UxTX
DS39969B-page 231