C8051F124TB Silicon Laboratories Inc, C8051F124TB Datasheet - Page 151

• Manufacturer Part Number: C8051F124TB
• Description: MCU, MPU & DSP Development Tools With C8051F124 MCU
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F124TB

• Processor To Be Evaluated: C8051F12x and C8051F13x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.2.7. Register Descriptions
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved bits
should not be set to logic l. Future product versions may use these bits to implement new features in which
case the reset value of the bit will be logic 0, selecting the feature's default state. Detailed descriptions of
the remaining SFRs are included in the sections of the datasheet associated with their corresponding sys-
tem function.
Bits7–0: SP: Stack Pointer.
Bits7–0: DPL: Data Pointer Low.
Bits7–0: DPH: Data Pointer High.
R/W
R/W
R/W
Bit7
Bit7
Bit7
The Stack Pointer holds the location of the top of the stack. The stack pointer is incremented
before every PUSH operation. The SP register defaults to 0x07 after reset.
The DPL register is the low byte of the 16-bit DPTR. DPTR is used to access indirectly
addressed XRAM and Flash memory.
The DPH register is the high byte of the 16-bit DPTR. DPTR is used to access indirectly
addressed XRAM and Flash memory.
R/W
R/W
R/W
Bit6
Bit6
Bit6
SFR Definition 11.8. DPH: Data Pointer High Byte
SFR Definition 11.7. DPL: Data Pointer Low Byte
R/W
R/W
R/W
SFR Definition 11.6. SP: Stack Pointer
Bit5
Bit5
Bit5
R/W
R/W
R/W
Bit4
Bit4
Bit4
Rev. 1.4
R/W
R/W
R/W
Bit3
Bit3
Bit3
C8051F120/1/2/3/4/5/6/7
R/W
R/W
R/W
Bit2
Bit2
Bit2
C8051F130/1/2/3
R/W
R/W
R/W
Bit1
Bit1
Bit1
SFR Address:
SFR Address:
SFR Address:
SFR Page:
SFR Page:
SFR Page:
R/W
R/W
R/W
Bit0
Bit0
Bit0
0x81
All Pages
0x82
All Pages
0x83
All Pages
00000000
00000000
Reset Value
00000111
Reset Value
Reset Value
151