C8051F124TB Silicon Laboratories Inc, C8051F124TB Datasheet - Page 186

MCU, MPU & DSP Development Tools With C8051F124 MCU

C8051F124TB

Manufacturer Part Number
C8051F124TB
Description
MCU, MPU & DSP Development Tools With C8051F124 MCU
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F124TB

Processor To Be Evaluated
C8051F12x and C8051F13x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
Electrical specifications for the precision internal oscillator are given in Table 14.1. Note that the system
clock may be derived from the programmed internal oscillator divided by 1, 2, 4, or 8, as defined by the
IFCN bits in register OSCICN.
186
Bits 7–0: OSCICL: Internal Oscillator Calibration Register.
Bit 7:
Bit 6:
Bits 5–2: Reserved.
Bits 1–0: IFCN1-0: Internal Oscillator Frequency Control Bits.
IOSCEN
R/W
Bit7
R/W
Bit7
This register calibrates the internal oscillator period. The reset value for OSCICL defines the
internal oscillator base frequency. The reset value is factory calibrated to generate an inter-
nal oscillator frequency of 24.5 MHz.
IOSCEN: Internal Oscillator Enable Bit.
0: Internal Oscillator Disabled.
1: Internal Oscillator Enabled.
IFRDY: Internal Oscillator Frequency Ready Flag.
0: Internal Oscillator not running at programmed frequency.
1: Internal Oscillator running at programmed frequency.
00: Internal Oscillator is divided by 8.
01: Internal Oscillator is divided by 4.
10: Internal Oscillator is divided by 2.
11: Internal Oscillator is divided by 1.
SFR Definition 14.1. OSCICL: Internal Oscillator Calibration.
IFRDY
SFR Definition 14.2. OSCICN: Internal Oscillator Control
R/W
Bit6
Bit6
R
R/W
R/W
Bit5
Bit5
-
R/W
Bit4
Bit4
R
-
Rev. 1.4
R/W
Bit3
R/W
Bit3
-
R/W
Bit2
R/W
Bit2
-
IFCN1
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
SFR Page:
SFR Page:
IFCN0
R/W
R/W
Bit0
Bit0
0x8B
F
0x8A
F
Reset Value
11000000
Reset Value
Variable

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