C8051F124TB Silicon Laboratories Inc, C8051F124TB Datasheet - Page 94

MCU, MPU & DSP Development Tools With C8051F124 MCU

C8051F124TB

Manufacturer Part Number
C8051F124TB
Description
MCU, MPU & DSP Development Tools With C8051F124 MCU
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of C8051F124TB

Processor To Be Evaluated
C8051F12x and C8051F13x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
7.2.3. Settling Time Requirements
A minimum tracking time is required before an accurate conversion can be performed. This tracking time is
determined by the ADC2 MUX resistance, the ADC2 sampling capacitance, any external source resis-
tance, and the accuracy required for the conversion. Figure 7.3 shows the equivalent ADC2 input circuit.
The required ADC2 settling time for a given settling accuracy (SA) may be approximated by Equation 7.1.
Note: An absolute minimum settling time of 800 ns required after any MUX selection. In low-power tracking
mode, three SAR2 clocks are used for tracking at the start of every conversion. For most applications,
these three SAR2 clocks will meet the tracking requirements.
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
R
n is the ADC resolution in bits (8).
94
TOTAL
AIN2.x
AIN2.y
is the sum of the ADC2 MUX resistance and any external source resistance.
RC
Differential Mode
MUX Select
MUX Select
Input
= R
MUX
Equation 7.1. ADC2 Settling Time Requirements
R
R
* C
MUX
MUX
SAMPLE
= 5k
Figure 7.3. ADC2 Equivalent Input Circuit
= 5k
Note: When the PGA gain is set to 0.5, C
t
C
C
=
SAMPLE
SAMPLE
ln
= 5pF
= 5pF
------ -
SA
2
n
Rev. 1.4
R
TOTAL
AIN2.x
C
SAMPLE
Single-Ended Mode
SAMPLE
RC
MUX Select
Input
= R
= 3pF
MUX
R
* C
MUX
SAMPLE
= 5k
C
SAMPLE
= 5pF

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