C8051F124TB Silicon Laboratories Inc, C8051F124TB Datasheet - Page 188

• Manufacturer Part Number: C8051F124TB
• Description: MCU, MPU & DSP Development Tools With C8051F124 MCU
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051F124TB

• Processor To Be Evaluated: C8051F12x and C8051F13x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
188
Bits 7–6: Reserved.
Bits 5–4: CLKDIV1–0: Output SYSCLK Divide Factor.
Bits 3–2: Reserved.
Bits 1–0: CLKSL1–0: System Clock Source Select Bits.
R/W
Bit7
-
These bits can be used to pre-divide SYSCLK before it is output to a port pin through the
crossbar.
00: Output will be SYSCLK.
01: Output will be SYSCLK/2.
10: Output will be SYSCLK/4.
11: Output will be SYSCLK/8.
See
put to a port pin.
00: SYSCLK derived from the Internal Oscillator, and scaled as per the IFCN bits in
OSCICN.
01: SYSCLK derived from the External Oscillator circuit.
10: SYSCLK derived from the PLL.
11: Reserved.
Section “18. Port Input/Output” on page 235
R/W
Bit6
SFR Definition 14.3. CLKSEL: System Clock Selection
-
CLKDIV1 CLKDIV0
R/W
Bit5
R/W
Bit4
Rev. 1.4
R/W
Bit3
-
R/W
Bit2
-
for more details about routing this out-
CLKSL1
R/W
Bit1
SFR Address:
CLKSL0 00000000
SFR Page:
R/W
Bit0
0x97
F
Reset Value