ADUC7061BCPZ32 Analog Devices Inc, ADUC7061BCPZ32 Datasheet - Page 65

DUAL 24-BIT AFE AND ARM 7 I.C

ADUC7061BCPZ32

Manufacturer Part Number
ADUC7061BCPZ32
Description
DUAL 24-BIT AFE AND ARM 7 I.C
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC7xxxr
Datasheet

Specifications of ADUC7061BCPZ32

Design Resources
USB Based Temperature Monitor Using ADuC7061 and an External RTD (CN0075) 4 mA-to-20 mA Loop-Powered Temperature Monitor Using ADuC7060/1 (CN0145)
Core Processor
ARM7
Core Size
16/32-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PWM, Temp Sensor, WDT
Number Of I /o
8
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.375 V ~ 2.625 V
Data Converters
A/D 5x24b, 8x24b, D/A 1x14b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
32-LFCSP
Package
32LFCSP EP
Device Core
ARM7TDMI
Family Name
ADuC7xxx
Maximum Speed
10.24 MHz
Operating Supply Voltage
2.5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
14
Interface Type
I2C/SPI/UART
On-chip Adc
2(4-chx24-bit)
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
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ADUC7061BCPZ32
Manufacturer:
AD
Quantity:
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Manufacturer:
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TIMERS
The ADuC706x features four general-purpose timer/counters.
The four timers in their normal mode of operation can be either
free running or periodic.
In free running mode, the counter decrements/increments from
the maximum or minimum value until zero/full scale and starts
again at the maximum or minimum value.
In periodic mode, the counter decrements/increments from the
value in the load register (TxLD MMR) until zero/full scale and
starts again at the value stored in the load register. Note that the
TxLD MMR should be configured before the TxCON MMR.
The value of a counter can be read at any time by accessing its
value register (TxVAL). Timers are started by writing in the
control register of the corresponding timer (TxCON).
In normal mode, an IRQ is generated each time that the value
of the counter reaches zero (if counting down) or full scale (if
counting up). An IRQ can be cleared by writing any value to the
clear register of the particular timer (TxCLRI).
Timer0
Timer1 or wake-up timer
Timer2 or watchdog timer
Timer3
Rev. B | Page 65 of 108
Table 78. Timer Event Capture
Bit
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Description
Reserved
Timer0
Timer1 or wake-up timer
Timer2 or watchdog timer
Timer3
Reserved
Reserved
Reserved
ADC
UART
SPI
XIRQ0
XIRQ1
I
I
PWM
XIRQ2 (GPIO IRQ2)
XIRQ3 (GPIO IRQ3)
2
2
C master
C slave
ADuC7060/ADuC7061

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