DSPIC33FJ32MC202-E/MM Microchip Technology, DSPIC33FJ32MC202-E/MM Datasheet - Page 199

16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE

DSPIC33FJ32MC202-E/MM

Manufacturer Part Number
DSPIC33FJ32MC202-E/MM
Description
16-bit DSC, 32KB Flash,Motor,40 MIPS,nanoWatt 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ32MC202-E/MM

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Package
28QFN-S EP
Device Core
dsPIC
Family Name
dSPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit|6-chx12-bit
Number Of Timers
5
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164336 - MODULE SOCKET FOR PM3 28/44QFNDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ32MC202-E/MM
Quantity:
600
20.0
The dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
devices have up to nine Analog-to-Digital Converter
(ADC) module input channels.
The AD12B bit (AD1CON1<10>) allows each of the
ADC modules to be configured as either a 10-bit,
4 sample-and-hold ADC (default configuration), or a
12-bit, 1 sample-and-hold ADC.
20.1
The 10-bit ADC configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 9 analog input pins
• External voltage reference input pins
• Simultaneous sampling of up to four analog input
• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Four result alignment options (signed/unsigned,
• Operation during CPU Sleep and Idle modes
• 16-word conversion result buffer
© 2011 Microchip Technology Inc.
Note:
pins
fractional/integer)
Note 1: This data sheet summarizes the features
2: Some registers and associated bits
10-BIT/12-BIT
ANALOG-TO-DIGITAL
CONVERTER (ADC)
Key Features
The ADC module must be disabled before
the AD12B bit can be modified.
of the dsPIC33FJ32MC202/204 and
dsPIC33FJ16MC304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section
Converter (ADC)” (DS70183) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available on the
Microchip website (www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
16.
“Analog-to-Digital
in
The 12-bit ADC configuration supports all the above
features, except:
• In the 12-bit configuration, conversion speeds of
• There is only 1 sample-and-hold amplifier in the
Depending on the particular device pinout, the ADC
can have up to nine analog input pins, designated AN0
through AN8. In addition, there are two analog input
pins for external voltage reference connections. These
voltage reference inputs can be shared with other
analog input pins.
The actual number of analog input pins and external
voltage reference input configuration will depend on the
specific device. Refer to the device data sheet for
further details.
A block diagram of the ADC is shown in
20.2
To configure the ADC module:
1.
2.
3.
4.
5.
6.
7.
8.
up to 500 ksps are supported.
12-bit configuration, so simultaneous sampling of
multiple channels is not supported.
Select
(AD1PCFGH<15:0> or AD1PCFGL<15:0>).
Select voltage reference source to match
expected
(AD1CON2<15:13>).
Select the analog conversion clock to match the
desired data rate with the processor clock
(AD1CON3<7:0>).
Determine how many sample-and-hold chan-
nels will be
AD1PCFGH<15:0> or AD1PCFGL<15:0>).
Select
sequence
AD1CON3<12:8>).
Select the way conversion results are presented
in the buffer (AD1CON1<9:8>).
Turn on the ADC module (AD1CON1<15>).
Configure ADC interrupt (if required):
a)
b)
ADC Initialization
Clear the AD1IF bit.
Select the ADC interrupt priority.
the
port
range
appropriate
used
pins
(AD1CON1<7:5>
on
(AD1CON2<9:8> and
as
sample/conversion
analog
DS70283H-page 199
analog
Figure
inputs
inputs
20-1.
and

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