FDD3510H Fairchild Semiconductor, FDD3510H Datasheet - Page 6

• Manufacturer Part Number: FDD3510H
• Description: IC MOSFET DUAL N/P 80V DPAK-4
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r

Specifications of FDD3510H

• Fet Type: N and P-Channel
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 80 mOhm @ 4.3A, 10V
• Drain To Source Voltage (vdss): 80V
• Current - Continuous Drain (id) @ 25° C: 4.3A, 2.8A
• Vgs(th) (max) @ Id: 4V @ 250µA
• Gate Charge (qg) @ Vgs: 18nC @ 10V
• Input Capacitance (ciss) @ Vds: 800pF @ 40V
• Power - Max: 1.3W
• Mounting Type: Surface Mount
• Package / Case: DPak, TO-252 (4 leads + tab)
• Configuration: Dual Common Drain Dual Source
• Transistor Polarity: N-Channel
• Resistance Drain-source Rds (on): 0.08 Ohm @ 10 V @ Q1
• Drain-source Breakdown Voltage: 80 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 4.3 A @ Q1 or 2.8 A @ Q2
• Power Dissipation: 3100 mW
• Maximum Operating Temperature: + 150 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDD3510HTR

Highly Integrated Green-Mode PWM Controller
Current-Sense Section
Symbol
Z
V
V
t
t
V
t
GATE Section
Symbol
DCY
V
V
tr
tf
I
V
RT Section
Symbol
I
V
V
t
t
Over Temperature Protection (OTP)
Symbol
T
T
*
** This is the threshold temperature for enabling the output again and resetting the latch after over-temperature protection has
© System General Corp.
Version 1.0.1 (IAO33.0083.B0)
PD
LEB
D-SSCP
GATE-SOURCE
RT
D-OTP1
D-OTP2
SENSE
OTP
Restart
STHFL
STHVA
S-SCP
GATE-L
GATE-H
GATE-CLAMP
RTTH1
RTTH2
When activated, the output is disabled and the latch is turned off.
been activated.
MAX
Parameter
Input Impedance
Current Limit Flatten Threshold Voltage
Current Limit Valley Threshold Voltage
Delay to Output
Leading-Edge Blanking Time
Threshold Voltage for SENSE Short-circuit
Protection
Delay Time for SENSE Short-circuit
Protection
Parameter
Maximum Duty Cycle
Gate Low Voltage
Gate High Voltage
Gate Rising Time
Gate Falling Time
Gate Source Current
Gate Output Clamping Voltage
Parameter
Output Current from the RT Pin
Over-Temperature Protection Threshold
Voltage
Over-Temperature Protection Threshold
Voltage
Over-Temperature Latch-off Debounce
Over-Temperature Latch-off Debounce
Parameter
Protection Junction Temperature
Restart Junction Temperature
**
*
Test Condition
V
V
Test Condition
V
V
V
V
V
V
Test Condition
0.7V ＜ V
12ms latch off
V
latch off
V
V
Test Condition
STHFL
SENSE
DD
DD
DD
DD
DD
DD
RT
RTTH2
RT
=15V, I
=12V, I
=15V, C
=15V, C
=15V, GATE=6V
=22V
＜ 0.7V, after 100µs
< V
–V
< 0.15V
＜ V
RTTH2
- 6 -
STHVA
RT
O
O
RT
=50mA
=50mA
L
L
＜ 1.05V, after
=1nF
=1nF
＜ V
RTTH1
www.sg.com.tw • www.fairchildsemi.com
Min.
Min.
0.87
0.18
275
0.10
100
Min.
92
1.015
0.65
8
60
Min.
60
8
150
30
250
Typ.
12
0.90
0.22
100
350
0.15
150
Typ.
100
1.050
0.70
12
100
Typ.
135
T
Typ.
65
250
50
OTP
-25
Product Specification
Max.
0.93
0.26
200
425
0.20
200
Max.
70
1.5
350
90
18
Max.
108
1.085
0.75
16
140
Max.
September 24, 2007
SG6742
Unit
%
V
V
ns
ns
mA
V
Unit
µA
V
V
ms
µs
Unit
°C
°C
Unit
KΩ
V
V
ns
ns
V
µs