FDN5618P Fairchild Semiconductor, FDN5618P Datasheet

FDN5618P

Manufacturer Part Number

FDN5618P

Description

MOSFET P-CH 60V 1.25A SSOT3

Manufacturer

Fairchild Semiconductor

Series

PowerTrench®r

Type

Power MOSFETr

Datasheet

1.FDN5618P.pdf (5 pages)

Specifications of FDN5618P

Fet Type

MOSFET P-Channel, Metal Oxide

Fet Feature

Logic Level Gate

Rds On (max) @ Id, Vgs

170 mOhm @ 1.25A, 10V

Drain To Source Voltage (vdss)

60V

Current - Continuous Drain (id) @ 25° C

1.25A

Vgs(th) (max) @ Id

3V @ 250µA

Gate Charge (qg) @ Vgs

13.8nC @ 10V

Input Capacitance (ciss) @ Vds

430pF @ 30V

Power - Max

460mW

Mounting Type

Surface Mount

Package / Case

3-SSOT, SuperSOT-3

Configuration

Single

Transistor Polarity

P-Channel

Resistance Drain-source Rds (on)

0.17 Ohm @ 10 V

Forward Transconductance Gfs (max / Min)

4.3 S

Drain-source Breakdown Voltage

60 V

Gate-source Breakdown Voltage

+/- 20 V

Continuous Drain Current

1.25 A

Power Dissipation

500 mW

Maximum Operating Temperature

+ 150 C

Mounting Style

SMD/SMT

Minimum Operating Temperature

- 55 C

Number Of Elements

Polarity

Channel Mode

Enhancement

Drain-source On-res

0.17Ohm

Drain-source On-volt

60V

Gate-source Voltage (max)

±20V

Output Power (max)

Not RequiredW

Frequency (max)

Not RequiredMHz

Noise Figure

Not RequireddB

Power Gain

Not RequireddB

Drain Efficiency

Not Required%

Operating Temp Range

-55C to 150C

Operating Temperature Classification

Military

Mounting

Surface Mount

Pin Count

Package Type

SuperSOT

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Other names

FDN5618PTR

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Current page: 1 of 4
Download datasheet (22Kb)

This is to inform you that a design and/or process change will be made to the following

product(s). This notification is for your information and concurrence.

If you require data or samples to qualify this change, please contact Fairchild Semiconductor

within 30 days of receipt of this notification.

Updated process quality documentation, such as FMEAs and Control Plans, are available for

viewing upon request.

If you have any questions concerning this change, please contact:

PCN Originator:

Name: Uy, Lilith

E-mail: Lilith.Uy@notes.fairchildsemi.com

Phone: 63-32-3400534 ext.5450

Implementation of change:

Expected 1st Device Shipment Date: 2008/12/07

Earliest Year/Work Week of Changed Product: 0849

Change Type Description: Bond Wire Material Composition

Description of Change (From): Bonding wire material is 50um Gold (Au).

Description of Change (To): Bonding wire material is 50um Copper (Cu).

Reason for Change : Cebu's SuperSOT-6lds is in production mode for Cu Wire since CY2005.

These are additional devices for SuperSOT-6lds and for another package - SuperSOT-3lds that

are ready for conversion to Copper. The reason for converting to copper wire is to increase

process robustness: (1) higher wire pull and ball shear readings which means stronger

interconnect; (2) Slower Intermetallic Growth (due to lower diffusion rate of Cu to Al) resulting

to no kirkendall voids and longer part life span; (3)Better electrical performance in terms of

lower resistivity and better conductivity

Qual/REL Plan Numbers : Q20070335;Q20080485

Qualification :

All reliability tests defined in Qual Plan Nos. Q20070335 (for SuperSOT-6lds) and

Q20080485 (for SuperSOT-3lds) have been completed without failures. Therefore

Fairchild Semiconductor is qualified to convert the devices listed in Affected FSID from

Au to Cu wire.

Results/Discussion for Qual Plan Number - Q20070335

Test: (Autoclave) | Conditions: 100%RH, 121C | Standard: JESD22-A102

DESIGN/PROCESS CHANGE NOTIFICATION -- FINAL

Technical Contact:

Name: Rivero, Douglas

E-mail: Doug.Rivero@fairchildsemi.com

Phone: 1-408-822-2143

Date Issued On : 2008/11/07

Date Created : 2008/10/30

PCN# : Q2081904-C

Pg. 1

Related parts for FDN5618P

FDN5618P Summary of contents

Page 1

... This is to inform you that a design and/or process change will be made to the following product(s). This notification is for your information and concurrence. If you require data or samples to qualify this change, please contact Fairchild Semiconductor within 30 days of receipt of this notification. Updated process quality documentation, such as FMEAs and Control Plans, are available for viewing upon request ...

Page 2

Lot Device Q20070335AAACLV FDC640P Q20070335ABACLV Q20070335BAACLV FDC655AN Q20070335BBACLV Q20070335CAACLV FDC654P Q20070335CBACLV Test: (High Temperature Reverse Bias) | Conditions: 150C, -16V | Standard: JESD22-A108 Lot Device Q20070335AAHTRB FDC640P Q20070335ABHTRB Test: (High Temperature Reverse Bias) | Conditions: 150C, -24V | Standard: JESD22-A108 ...

Page 3

Test: (Temperature Cycle) | Conditions: -65C, 150C | Standard: JESD22-A104 Lot Device Q20070335AATMCL1 FDC640P Q20070335ABTMCL1 Q20070335BATMCL1 FDC655AN Q20070335BBTMCL1 Q20070335CATMCL1 FDC654P Q20070335CBTMCL1 Results/Discussion for Qual Plan Number - Q20080485 Test: (High Temperature Reverse Bias) | Conditions: 150C, -16V | Standard: JESD22-A108 ...

Page 4

... Affected FSIDs : FDC606P_NBCE003A FDC642P_SB4N006 FDC658P_NB4E011 FDN304PZ FDN339AN FDN340P_G FDN359BN FDN360P_NBGT003B FDN5618P FDN5630_NB5N008A 100-CYCLES 0/77 500-CYCLES 0/77 100-CYCLES 0/77 500-CYCLES 0/77 100-CYCLES 0/77 500-CYCLES 0/77 FDC637AN_NB5E023A FDC654P_NBGT007 FDC658P_NB4E012 FDN304P FDN3400 FDN342P FDN360P FDN371N FDN5618P_SB4N007 FDC640P_NBAD004A FDC658P_NB4E009A FDN302P FDN306P FDN340P FDN359AN FDN360P_G FDN372S FDN5630 Pg. 4 ...

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