SI4435DY Fairchild Semiconductor, SI4435DY Datasheet - Page 2

• Manufacturer Part Number: SI4435DY
• Description: MOSFET P-CH 30V 8.8A 8-SOIC
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r
• Type: Power MOSFETr

Specifications of SI4435DY

• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 20 mOhm @ 8.8A, 10V
• Drain To Source Voltage (vdss): 30V
• Current - Continuous Drain (id) @ 25° C: 8.8A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 24nC @ 5V
• Input Capacitance (ciss) @ Vds: 1604pF @ 15V
• Power - Max: 1W
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Number Of Elements: 1
• Polarity: P
• Channel Mode: Enhancement
• Drain-source On-res: 0.02Ohm
• Drain-source On-volt: 30V
• Gate-source Voltage (max): ±20V
• Continuous Drain Current: 8.8A
• Power Dissipation: 2.5W
• Operating Temp Range: -55C to 175C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Pin Count: 8
• Package Type: SOIC N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: SI4435DYFSTR

Notes:
1. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%
Electrical Characteristics
Symbol
Off Characteristics
BV
I
I
I
On Characteristics
V
R
I
g
Dynamic Characteristics
C
C
C
Switching Characteristics
t
t
t
t
Q
Q
Q
Drain–Source Diode Characteristics and Maximum Ratings
I
V
DSS
GSSF
GSSR
D(on)
S
the drain pins. R
d(on)
r
d(off)
f
FS
BV
V
DS(on)
iss
oss
rss
GS(th)
g
gs
gd
SD
JA
DSS
GS(th)
T
T
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
DSS
J
J
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
JC
is guaranteed by design while R
a) 50°C/W when
mounted on a 1in
pad of 2 oz copper
Parameter
(Note 2)
2
(Note 2)
CA
is determined by the user's board design.
V
I
V
V
V
V
I
V
V
V
V
V
V
f = 1.0 MHz
V
V
V
V
V
T
D
D
A
GS
DS
GS
GS
DS
GS
GS
GS
GS
DS
DS
DD
GS
DS
GS
GS
b) 105°C/W when
= –250 A, Referenced to 25 C
= –250 A, Referenced to 25 C
= 25°C unless otherwise noted
= –10 V, I
mounted on a .04 in
pad of 2 oz copper
= 0 V, I
= –24 V,
= 20 V,
= –20 V,
= V
= –10 V,
= –4.5 V,
= –10 V,
= –5 V,
= –15 V,
= –15 V,
= –10 V,
= –15 V,
= –5 V
= 0 V, I
Test Conditions
GS
, I
D
D
= –250 A
S
= –250 A
D
= –2.1 A
= –8.8A, T
V
V
V
I
I
V
I
D
D
D
V
I
I
R
GS
DS
DS
D
D
2
= –8.8 A
= –6.7 A
GS
GEN
= –8.8 A,
DS
= –8.8 A
= –1 A,
= 0 V
= 0 V
= 0 V
= 0 V,
= –5 V
= 6
J
(Note 2)
=125 C
Min
–30
–40
–1
c) 125°C/W when mounted on a
minimum pad.
–0.73
1604
Typ
–1.7
13.5
–21
408
202
15
22
19
24
13
42
25
17
5
5
6
Max Units
–100
–2.1
–1.2
100
–1
–3
20
35
32
23
24
68
40
24
SI4435DY Rev D1(W)
mV/ C
mV/ C
m
nA
nA
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
V
A
S
A
V
A