78Q8430-100CGTR/F Maxim Integrated Products, 78Q8430-100CGTR/F Datasheet - Page 61

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78Q8430-100CGTR/F

Manufacturer Part Number
78Q8430-100CGTR/F
Description
Telecom ICs 10/100MAC+PHY MULTI MEDIA OFFLOAD CNTRLR
Manufacturer
Maxim Integrated Products
Datasheet
DS_8430_001
7.6.6
7.6.7
7.6.8
7.6.9
7.6.10 Receive FIRST BLOCK Status Register
Rev. 1.2
Name: ID
Bits
31:16
15:8
7:0
Name: GBI_CS
Bits
31:5
4:0
Name: RTTR
Bits
31:1
0
Name: FDR
Bits
31:1
0
Name: RFBSR
Bits
31:18
17
16
15
14:8
7:0
Revision ID
Configuration
Receive to Transmit Transfer Register
Frame Disposition Register
Type
Type
Type
Type
Type
RW
RO
RO
RO
RO
W
R
R
R
R
X
X
Default
Default
Default
Default
Default
8430
Reset Val: 0x8430_0102
Reset Val: 0x0000_0000
Reset Val: 0x0000_0000
Reset Val: 0x0000_0000
Reset Val: 0x0002_0000
00
00
2
1
0
0
1
0
Description
Prod ID
Indicates the product number.
Ver ID
Indicates the product version number.
Rev ID
Indicates the silicon revision number.
Description
Reserved
CONF
The current status of the configuration pins.
Description
Reserved
Transfer
Writing a one to this bit signals the QUE logic to transfer the QUE0
FIRST BLOCK to QUE3. The QUE logic clears the bit when the
operation is complete.
Description
Reserved
Drop Rx Frame
Writing a 1 to this bit causes the Rx consumer to drop the current frame
entirely from the QUE.
Description
Reserved
EOF
The FIRST BLOCK is the end of its frame.
ERR
The FIRST BLOCK is the end of a truncated frame.
Reserved
Next
The BLOCK that is next in QUE0 after the current FIRST BLOCK.
Used
The number of valid bytes in the FIRST BLOCK for QUE0.
Block: CTL
Block: CTL
Block: CTL
Block: CTL
Block: CTL
Address: 0x118
Address: 0x11C
Address: 0x128
Address: 0x12C
Address: 0x130
78Q8430 Data Sheet
61

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