78Q8430-100CGTR/F Maxim Integrated Products, 78Q8430-100CGTR/F Datasheet - Page 63

• Manufacturer Part Number: 78Q8430-100CGTR/F
• Description: Telecom ICs 10/100MAC+PHY MULTI MEDIA OFFLOAD CNTRLR
• Manufacturer: Maxim Integrated Products

DS_8430_001
7.6.13 BIST Bypass Mode Data Register
7.6.14 Station Management Data Register
7.6.15 Station Management Control and Address Register
7.6.16 PROM Data Register
Rev. 1.2
Name: BBDR
Bits
31:0
Name: MDDAR
Bits
31:16
15:0
Name: MDCAR
Bits
31:13
12
11
10
9:5
4:0
Name: PRDR
Bits
31:16
15:0
Type
Type
Type
Type
R/W
RW
RW
RW
RW
RW
RW
RW
X
X
X
Default
Default
Default
Default
0000
0000
0000
0000
Reset Val: N/A
Reset Val: 0x0000_0000
Reset Val: 0x0000_0000
Reset Val: 0x0000_0000
0
0
0
0
0
0
Description
RAM Data
Reads and writes to these bits go directly to the QMEM RAM at the
location indicated by BCR only when the BIST mode is set to BYPASS.
Description
Reserved
SMI Data
Data read from or data to be written to the PHY. See Section 7.7.
Description
Reserved
Preamble
Writing a 1 suppresses the generation of the 32-bit PHY station
management preamble before the PHY register transfer. The internal
PHY of the 8430 does not require the preamble.
Busy
Writing a 1 initiates the PHY register transfer. The hardware will clear
the bit when the operation completes.
RegWr
Writing a 1 indicated the MDDAR data is to be written to the PHY.
Writing a 0 causes the PHY register to be read and the data placed in
the MDDAR .
PHY Addr
Address of the PHY to access.
PHY Reg
Address of the PHY register to access.
Description
Reserved
PROM Data
Data to write to or read from the EEPROM device.
Block: CTL
Block: CTL
Block: CTL
Block: CTL
Address: 0x13C
Address: 0x140
Address: 0x144
Address: 0x148
78Q8430 Data Sheet
63