ISPGDX160A-5Q208 Lattice, ISPGDX160A-5Q208 Datasheet - Page 31

• Manufacturer Part Number: ISPGDX160A-5Q208
• Description: Analog & Digital Crosspoint ICs PROGRAMMABLE GEN DIG CROSSPOINT
• Manufacturer: Lattice

Specifications of ISPGDX160A-5Q208

• Mounting Style: Through Hole
• Number Of Arrays: 1
• Operating Supply Voltage: 5 V
• Supply Type: Single
• Configuration: 160 x 160
• Package / Case: DIP-24
• Input Level: TTL
• Output Level: TTL
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Product: Digital Crosspoint
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Signal
I/O D36
I/O D34
I/O D30
I/O D24
I/O D20
I/O D16
I/O D13
I/O D8
I/O D5
I/O D4
I/O D39
I/O D33
I/O D29
I/O D27
I/O D25
I/O D21
I/O D19
I/O D15
I/O D11
I/O D7
I/O D2
I/O A1
I/O D38
I/O D35
I/O D32
I/O D28
I/O D26
I/O D22
I/O D18
I/O D14
I/O D12
I/O D9
I/O D6
I/O D3
I/O D1
I/O C39
I/O A2
I/O D37
I/O D31
I/O D23
I/O D17
I/O D10
I/O D0
I/O C38
I/O C36
I/O A4
I/O A3
I/O A0
I/O C37
I/O C33
I/O A8
I/O A7
I/O A5
I/O C35
I/O Locations: ispGDX160V/VA (Ordered by 272-Ball BGA Location)
I/O
CLK/CLK_EN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
MUXsel1
MUXsel1
MUXsel2
MUXsel2
MUXsel2
MUXsel2
MUXsel2
MUXsel2
MUXsel1
MUXsel1
MUXsel2
MUXsel1
MUXsel1
MUXsel1
MUXsel1
MUXsel1
MUXsel2
MUXsel2
MUXsel1
MUXsel2
MUXsel2
MUXsel1
MUXsel1
MUXsel2
MUXsel2
MUXsel2
Control
Signal
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
PQFP fpBGA BGA
208
205
202
198
190
186
174
171
164
161
160
208
201
197
194
191
187
177
173
167
163
157
207
203
200
196
192
188
176
172
169
165
162
158
155
152
206
199
189
175
166
154
151
149
150
145
147
11
10
3
4
7
5
2
8
208
D10
A12
B13
B14
C14
C10
B11
B12
C13
B15
B10
C11
D11
A13
A14
A15
A16
C15
A11
C12
B16
D14
C16
D15
E14
D16
C7
C8
C4
C6
D7
D8
C2
C3
C5
C1
D1
D3
A3
B4
A5
A2
A4
B6
A6
B7
B8
B1
B3
B5
A7
A1
B2
E3
272
A13
A14
A16
A17
A18
B12
B13
B15
B16
B17
C12
C13
C14
C15
C16
C17
C19
C20
D12
D14
D18
D19
D20
E18
E20
F18
A3
A4
A5
A8
A9
B3
B5
B6
B7
B8
B9
C1
C4
C5
C6
C7
C8
C9
D1
D5
D7
D9
E1
E3
E4
F1
F2
F3
Signal
I/O C32
I/O C30
I/O A11
I/O A10
I/O A9
I/O A6
I/O C34
I/O C31
I/O C29
I/O C28
I/O A12
I/O C27
I/O A16
I/O A15
I/O A14
I/O A13
I/O C26
I/O C25
I/O C24
I/O C23
I/O A19
I/O A17
I/O A18
I/O C22
I/O C21
I/O C20
I/O A20
I/O A21
I/O A22
I/O C18
I/O C17
I/O C19
I/O A23
I/O A24
I/O A25
I/O A26
I/O C13
I/O C14
I/O C15
I/O C16
I/O A27
I/O C12
I/O A28
I/O A29
I/O A31
I/O A34
I/O C6
I/O C9
I/O C10
I/O C11
I/O A30
I/O A32
I/O A35
I/O
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
Control
MUXsel1
MUXsel2
MUXsel1
MUXsel1
MUXsel1
MUXsel2
MUXsel2
MUXsel2
MUXsel1
MUXsel1
MUXsel2
MUXsel2
MUXsel1
MUXsel1
MUXsel1
MUXsel1
MUXsel2
MUXsel2
MUXsel1
MUXsel1
MUXsel2
MUXsel2
MUXsel2
MUXsel1
MUXsel1
MUXsel1
MUXsel2
MUXsel1
MUXsel2
Signal
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
Specifications ispGDX160V/VA
30
PQFP fpBGA BGA
208
144
142
146
143
141
140
138
136
135
134
133
132
131
130
127
126
128
122
123
124
125
120
113
116
117
118
32
42
14
13
12
16
21
20
19
18
24
22
23
26
27
28
29
30
31
34
36
37
39
38
40
43
9
208
G13
G15
G14
G16
H13
H15
H16
H14
N16
M16
E16
F14
E15
F15
F16
K13
K15
K14
K16
L16
L15
L14
J16
J15
J13
J14
G3
G2
G4
G1
M2
M3
F3
E1
E2
D2
F2
F1
H2
H4
H3
H1
K1
K3
K2
K4
J1
J3
J2
J4
L2
L1
L3
272
M18
M19
G17
G18
G19
G20
H19
K17
K18
K19
M17
M20
N19
P17
P18
P19
P20
F19
F20
J17
J18
J20
L18
L19
L20
J19
G1
G2
G3
G4
H2
M1
M2
M3
M4
N2
R1
R2
R3
K1
K2
K3
L2
L3
L4
P1
P2
P3
P4
J1
J2
J3
J4
Signal
I/O C5
I/O C7
I/O C8
I/O A33
I/O A37
I/O C0
I/O C3
I/O C4
I/O A36
I/O A38
I/O B0
I/O B10
I/O B17
I/O B22
I/O B30
I/O B36
I/O C2
I/O A39
I/O B1
I/O B3
I/O B6
I/O B9
I/O B12
I/O B14
I/O B18
I/O B21
I/O B25
I/O B31
I/O B34
I/O B37
I/O C1
I/O B2
I/O B7
I/O B11
I/O B15
I/O B19
I/O B20
I/O B24
I/O B28
I/O B32
I/O B35
I/O B38
I/O B4
I/O B5
I/O B8
I/O B13
I/O B16
I/O B23
I/O B26
I/O B27
I/O B29
I/O B33
I/O B39
I/O
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
CLK/CLKEN
MUXsel2
MUXsel2
MUXsel1
MUXsel1
MUXsel1
MUXsel1
MUXsel1
MUXsel2
MUXsel2
MUXsel1
MUXsel1
MUXsel1
MUXsel2
MUXsel1
MUXsel1
MUXsel2
MUXsel2
MUXsel2
MUXsel2
MUXsel2
MUXsel1
MUXsel2
MUXsel1
MUXsel2
MUXsel2
Control
Signal
CLK
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
OE
PQFP fpBGA BGA
208
112
114
115
106
109
111
101
108
102
107
103
104
41
46
45
47
50
61
70
84
94
48
51
53
57
60
64
67
71
83
87
95
98
52
58
62
68
72
82
86
92
96
99
55
56
59
66
69
85
88
90
93
97
M14
M15
208
N15
P14
N14
P16
T10
P12
R14
R16
N10
R12
T14
T15
P15
R10
R11
T13
P13
T16
P10
T11
P11
T12
R13
R15
M1
N2
N1
N3
P2
T4
P1
R1
T1
R3
R4
R5
T5
N7
N9
R2
P4
P5
R6
R7
R9
P3
T2
T3
N6
P6
T6
W12
W13
W15
W16
W17
W18
272
R18
R19
R20
U12
U14
U16
U20
T17
T18
T20
V12
V13
V15
V16
V17
V20
Y13
Y14
Y15
Y16
Y17
Y19
W4
W5
W6
W8
W9
T1
T3
U1
U2
U3
U7
U9
V1
V2
V4
V5
V6
V7
V8
V9
Y3
Y4
Y5
Y7
Y8