LAN91C110-PU SMSC, LAN91C110-PU Datasheet - Page 35

• Manufacturer Part Number: LAN91C110-PU
• Description: Ethernet ICs Non-PCI 10/100 Ethernet MAC
• Manufacturer: SMSC
• Type: Single Chip MAC and PHY Controllerr

Specifications of LAN91C110-PU

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: 802.3
• Data Rate: 10 MB, 100 MB
• Supply Voltage (max): 5 V
• Supply Voltage (min): 0 V
• Supply Current (max): 40 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-144
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

BANK 3
FLTST - Facilitates the inclusion of packet forwarding information on the receive packet memory structure. When 0, RD0-
RD7 is always driven. When 1, RD0-RD7 is floated during RECEIVE FRAME STATUS WORD writes (RA2-RA16=0,
RCVDMA=1, nRWE0-nRWE3=0).
MSK_CRS100 - Disables CRS100 detection during transmit in half duplex mode (SWFDUP=0).
MDO - MII Management output. The value of this bit drives the MDO pin.
MDI - MII Management input. The value of the MDI pin is readable using this bit.
MDCLK - MII Management clock. The value of this bit drives the MDCLK pin.
MDOE - MII Management output enable. When high pin MDO is driven, when low pin MDO is tri-stated.
The purpose of this interface, along with the corresponding pins is to implement MII PHY management in software.
BANK 3
CHIP - Chip ID. Can be used by software drivers to identify the device used.
REV - Revision ID. Incremented for each revision of a given device.
SMSC LAN91C110 Rev. B
BYTE
BYTE
HIGH
LOW
OFFSET
A
HIGH
BYTE
BYTE
LOW
OFFSET
8
0
1
FLTST
0
0
REVISION REGISTER
0
0
MANAGEMENT INTERFACE
CRS100
CHIP
MSK_
NAME
0
0
1
0
NAME
1
1
DATASHEET
1
1
Page 35
FEAST Fast Ethernet Controller for PCMCIA and Generic 16-Bit Applications
1
1
0
0
READ ONLY
MDOE
TYPE
READ/WRITE
0
0
TYPE
0
0
REV
MCLK
0
0
1
0
SYMBOL
MDI Pin
MDI
REV
1
SYMBOL
MGMT
1
0
Revision 1.0 (11-04-08)
MDO
1
0
Datasheet