LAN9312-NZW SMSC, LAN9312-NZW Datasheet - Page 450
LAN9312-NZW
Manufacturer Part Number
LAN9312-NZW
Description
Ethernet ICs Hi Per 2 Port 10/100 Ethernet Switch
Manufacturer
SMSC
Type
Two Port Managed Ethernet Switchr
Datasheet
1.LAN9312-NZW.pdf
(458 pages)
Specifications of LAN9312-NZW
Ethernet Connection Type
10 Base-T, 100 Base-TX
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Product
Ethernet Switches
Number Of Transceivers
1
Standard Supported
802.3, 802.3u
Data Rate
10 Mbps, 100 Mbps
Supply Voltage (max)
3.3 V
Supply Voltage (min)
0 V
Supply Current (max)
186 mA, 295 mA
Maximum Operating Temperature
+ 70 C
Package / Case
TQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9312-NZW
Manufacturer:
Standard
Quantity:
143
Company:
Part Number:
LAN9312-NZW
Manufacturer:
Microchip Technology
Quantity:
10 000
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Revision 1.7 (06-29-10)
15.5.9
SYMBOL
t
cycle
t
t
t
A[2], END_SEL
t
t
t
csh
asu
dsu
csl
ah
dh
FIFO_SEL
nCS, nWR
TX Data FIFO Direct PIO Write Cycle Timing
Please refer to
description of this mode.
Note: A TX Data FIFO direct PIO write cycle begins when both nCS and nWR are asserted. The
D[31:0]
Write Cycle Time
nCS, nWER Assertion Time
nCS, nWR De-assertion Time
Address, FIFO_SEL Setup to nCS, nWR Assertion
Address, FIFO_SEL Hold Time
Data Setup to nCS, nWR De-assertion
Data Hold Time
cycle ends when either or both nCS and nWR are de-asserted. They may be asserted and de-
asserted in any order.
Table 15.13 TX Data FIFO Direct PIO Write Cycle Timing Values
Figure 15.9 TX Data FIFO Direct PIO Write Cycle Timing
Section 8.4.9, "TX Data FIFO Direct PIO Writes," on page 111
DESCRIPTION
t
asu
High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
DATASHEET
450
t
csl
t
t
cycle
dsu
MIN
45
32
13
7
0
0
0
t
dh
t
ah
TYP
t
csh
MAX
for a functional
SMSC LAN9312
Datasheet
UNITS
nS
nS
nS
nS
nS
nS
nS
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