TMC2192KHC Fairchild Semiconductor, TMC2192KHC Datasheet - Page 22

• Manufacturer Part Number: TMC2192KHC
• Description: Video ICs
• Manufacturer: Fairchild Semiconductor
• Type: Encoderr

Specifications of TMC2192KHC

• Operating Supply Voltage: - 0.5 V to + 7 V
• Supply Current: 375 mA
• Maximum Operating Temperature: 70 C
• Package / Case: MQFP-100
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TMC2192
Table 11. Standard Subcarrier Parameters
Subcarrier Synchronization
There are 5 modes of subcarrier synchronization in the
TMC2192, freerun, subcarrier reset, Genlock, DRS-lock and
Ancillary Data Control (ANC).
•
At the rising edge of RESET the DDS starts to generate the
subcarrier reference and will continue to freerun the subcar-
rier. When setting the control register DDSRST is HIGH, the
TMC2192 will reset the DDS to the SYSPH value on the
next field 1, line 1 (line 4 for NTSC), pixel 1 occurrence and
will reset this bit to be LOW. This allows the encoder to start
with the correct SCH relationship. The phase of the subcar-
rier reference will drift over time since a 32 bit accumulator
has a error of 0.5 Hz when generating the subcarrier refer-
ence for NTSC 13.5 MHz.
•
At the rising edge of RESET the DDS starts to generate the
subcarrier reference and will reset the DDS to the SYSPH
value every field 1, line 1 (line 4 for NTSC), pixel 1 occur-
rence. This enables the encoder to maintain the proper SCH
relationship.
•
The Genlock mode allows the TMC2192 to lock to a com-
posite reference when used in conjunction with the
TMC22071A Genlocking Video Digitizer. The TMC22071A
produces a genlock reference signal (GRS) which contains
field identification, PALODD status, relative phase and rela-
tive frequency of the composite reference. The GRS is sam-
pled on the CVBS bus 60 PXCK’s after the falling edge of
HSIN. The phase and frequency values are used to update
the DDS on a line to line basis, thus synchronizing the sub-
carrier to an external composite reference.
•
The DRS-Lock mode allows the TMC2192 to lock its com-
posite output to the decoded composite or S-video input of
22
Standard
NTSC sqr. pixel
NTSC CCIR-601
NTSC 4x F
PAL sqr. pixel
PAL CCIR-601
PAL 15 Mpps
PAL-M sqr.pixel
PAL-M CCIR-601
PAL-M 4x F
Freerun
Subcarrier Reset
Genlock
DRS-Lock
SC
SC
Field
59.94
59.94
59.94
50.00
50.00
50.00
60.00
60.00
60.00
Rate
(Hz)
Horizontal
15.734266
15.734266
15.734266
15.625000
15.625000
15.625000
15.750000
15,750000
15,750000
Freq.
(kHz)
(Mpps)
12.27
13.50
14.32
14.75
13.50
15.00
12.50
13.50
14.30
Pixel
Rate
PXCK
(MHz)
28.64
28.60
Freq.
24.54
27.00
29.50
27.00
30.00
25.01
27.00
3.57954500
3.57954500
3.57954500
4.43361875
4.43361875
4.43361875
3.57561149
3.57561149
3.57561149
Subcarrier
(MHz)
Freq.
BURPHM BURPHL SYSPHM SYSPHL FREQM FREQ2 FREQ3 FREQL
47
00
00
00
00
00
00
00
00
00
the TMC22x5y. The TMC22x5y produces a decoder refer-
ence signal (DRS) which contains field identification, PAL-
ODD status, relative phase and relative frequency of the
composite or S-video input. The DRS is sampled on either
the CVBS bus or the PD port, depending on DRSSEL, 60
PXCK’s after the falling edge of HSIN. The phase and fre-
quency values are used to update the DDS on a line to line
basis, thus synchronizing the subcarrier to an external com-
posite reference.
•
Subcarrier synchronization in ANC mode is covered in the
Ancillary Data Control section of this data sheet.
SCH Phase Error Correction
SCH refers to the timing relationship between the 50% point
of the leading edge of horizontal sync and the positive or
negative zero-crossing of the color burst subcarrier refer-
ence. SCH error is usually expressed in degrees of subcarrier
phase. In PAL, SCH is defined for line 1 of field 1, but since
there is no color burst on line 1, SCH is usually measured at
line 7 of field 1. The need to specify SCH relative to a partic-
ular line in PAL is due to the 25 Hz offset of PAL subcarrier
frequency. Since NTSC has no such 25 Hz offset, SCH
applies to all lines.
The SCH relationship is important in the TMC2192 when
two video sources are being combined or if the composite
video output is externally combined with another video
source. In these cases, improper SCH phasing will result in a
noticeable horizontal jump of one image with respect to
another and/or a change in hue proportional to the SCH error
between the two sources.
SCH phasing can be adjusted by modifying BURPH and
SYSPH values by equal amounts. SCH is advanced/delayed
by one degree by increasing/decreasing the value of BURPH
and SYSPH by approximately B6
corrected with SYSPH and BURPH offsets of AAA
Ancillary Data Control (ANC)
46
00
00
00
00
00
00
00
00
00
45
00
00
00
00
00
00
00
00
00
Subcarrier Register (hex)
44
00
00
00
00
00
00
00
00
00
4A
4C
4B
43
43
40
54
49
43
40
h
PRODUCT SPECIFICATION
. An SCH error of 15
AA
AA
DF
42
E0
F3
00
13
45
10
REV. 1.0.0 8/13/03
AA
C6
41
F8
00
18
15
00
3F
66
h
.
o
40
AB
3E
A1
D7
F5
00
19
96
51
is