FDW6923 Fairchild Semiconductor, FDW6923 Datasheet - Page 2
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FDW6923
Manufacturer Part Number
FDW6923
Description
MOSFET P-CH 20V 3.5A 8-TSSOP
Manufacturer
Fairchild Semiconductor
Series
PowerTrench®r
Datasheet
1.FDW6923.pdf
(5 pages)
Specifications of FDW6923
Fet Type
MOSFET P-Channel, Metal Oxide
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
45 mOhm @ 3.5A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
3.5A
Vgs(th) (max) @ Id
1.5V @ 250µA
Gate Charge (qg) @ Vgs
16nC @ 4.5V
Input Capacitance (ciss) @ Vds
1030pF @ 10V
Power - Max
1.2W
Mounting Type
Surface Mount
Package / Case
8-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
FDW6923
Manufacturer:
PERICOM
Quantity:
3 122
Part Number:
FDW6923
Manufacturer:
FRIRGHILD
Quantity:
20 000
Notes:
1. R
2. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%
Electrical Characteristics
Symbol
Off Characteristics
BV
I
I
I
On Characteristics
V
R
I
g
Dynamic Characteristics
C
C
C
Switching Characteristics
t
t
t
t
Q
Q
Q
Drain–Source Diode Characteristics and Maximum Ratings
I
V
I
Schottky Diode Characteristics
I
V
C
the drain pins. R
R
DSS
GSSF
GSSR
D(on)
d(on)
r
d(off)
f
S
GSSR
R
BV
V
FS
GS(th)
SD
F
DS(on)
iss
oss
rss
T
g
gs
gd
JA
JA
GS(th)
DSS
T
T
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is 115 C/W for the MOSFET and 130 C/W for the Schottky Diode when mounted on a minimum pad.
DSS
J
J
Drain–Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate–Body Leakage, Forward
Gate–Body Leakage, Reverse
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
Gate–Body Leakage, Reverse
Reverse Leakage
Forward Voltage
Junction Capacitance
JC
is guaranteed by design while R
Parameter
(Note 2)
(Note 2)
CA
is determined by the user's board design.
T
V
I
V
V
V
V
I
V
V
V
V
V
V
f = 1.0 MHz
V
V
V
V
V
V
V
I
V
A
D
D
F
= 25°C unless otherwise noted
GS
DS
GS
GS
DS
GS
GS
GS
GS
DS
DS
DD
GS
DS
GS
GS
GS
R
R
= 1A
= –250 A, Referenced to25 C
= –250 A, Referenced to25 C
= 20V
= 10V
=–4.5 V, I
= –16 V,
= V
= –5 V,
= –10 V,
= –5V,
= 0 V, I
= –12 V,
= 12 V,
= –4.5 V,
= –2.5 V,
= –4.5 V,
= –5 V,
= –4.5 V,
= –4.5 V
= 0 V,
= 12 V,
Test Conditions
GS
, I
D
D
I
= –250 A
= –250 A
D
S
=–3.5A, T
= –1.25 A
V
V
V
V
I
I
V
I
GS
DS
DS
D
D
V
I
I
R
D
DS
D
D
GS
DS
= –3.5 A
= –2.7 A
GEN
= –3.5 A,
= 0 V
= –3.5A
= –1 A,
= 0 V
= 0 V
= 0 V
= –5 V
= 0 V,
= 6
T
T
T
T
J
J
J
J
J
=25 C
=125 C
=25 C
=125 C
=125 C
(Note 2)
Min
–0.6
–20
–15
Typ Max Units
1030
–1.0
13.2
–0.6
0.48
0.42
–16
280
120
9.7
2.2
2.4
0.6
36
56
49
11
18
34
34
50
3
1
–1.25
–100
–1.5
–1.2
0.55
0.50
100
100
–1
45
75
72
20
32
55
55
16
50
8
FDW6923 Rev. D1 (W)
mV/ C
mV/ C
m
mA
nC
nC
nC
nA
nA
pF
pF
pF
nA
pF
ns
ns
ns
ns
V
V
A
S
A
V
V
V
A
A