MT47H64M8CF-25E IT:G Micron Technology Inc, MT47H64M8CF-25E IT:G Datasheet - Page 115

• Manufacturer Part Number: MT47H64M8CF-25E IT:G
• Description: 64MX8 DDR2 SDRAM PLASTIC IND TEMP FBGA 1.8V
• Manufacturer: Micron Technology Inc

SELF REFRESH
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. T 2/12 EN
The SELF REFRESH command is initiated when CKE is LOW. The differential clock
should remain stable and meet
fresh mode. The procedure for exiting self refresh requires a sequence of commands.
First, the differential clock must be stable and meet
prior to CKE going back to HIGH. Once CKE is HIGH (
with three clock registrations), the DDR2 SDRAM must have NOP or DESELECT com-
mands issued for
ments is used to apply NOP or DESELECT commands for 200 clock cycles before apply-
ing any other command.
t
XSNR. A simple algorithm for meeting both refresh and DLL require-
115
t
CKE specifications at least 1 ×
Micron Technology, Inc. reserves the right to change products or specifications without notice.
512Mb: x4, x8, x16 DDR2 SDRAM
t
CK specifications at least 1 ×
t
CKE [MIN] has been satisfied
t
CK after entering self re-
2004 Micron Technology, Inc. All rights reserved.
SELF REFRESH
t
CK