MT48H8M32LFB5-75 IT:H Micron Technology Inc, MT48H8M32LFB5-75 IT:H Datasheet - Page 18

DRAM Chip Mobile SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray

MT48H8M32LFB5-75 IT:H

Manufacturer Part Number
MT48H8M32LFB5-75 IT:H
Description
DRAM Chip Mobile SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr

Specifications of MT48H8M32LFB5-75 IT:H

Density
256 Mb
Maximum Clock Rate
133 MHz
Package
90VFBGA
Address Bus Width
14 Bit
Operating Supply Voltage
1.8 V
Maximum Random Access Time
8|6 ns
Operating Temperature
-40 to 85 °C
Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
256M (8Mx32)
Speed
133MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Package / Case
90-VFBGA
Organization
8Mx32
Address Bus
14b
Access Time (max)
8/6ns
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
100mA
Pin Count
90
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Partial-Array Self Refresh (PASR)
Driver Strength
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
256mb_x16_sdram_y36m_1.fm - Rev G 6/09 EN
1. All banks (banks 0, 1, 2, and 3).
2. Two banks (banks 0 and 1; BA1 = 0).
3. One bank (bank 0; BA1 = BA0 = 0).
4. Half bank (bank 0; BA1 = BA0 = row address MSB = 0).
5. Quarter bank (bank 0; BA1 = BA0; row address MSB = row address MSB -1 = 0).
For further power savings during self refresh, the partial-array self refresh (PASR) feature
allows the controller to select the amount of memory that will be refreshed during self
refresh. The following refresh options are available.
WRITE and READ commands occur to any bank selected during standard operation, but
only the selected banks in PASR will be refreshed during self refresh. It is important to
note that data in banks 2 and 3 will be lost when the two-bank option is used.
Bits E5 and E6 of the EMR can be used to select the driver strength of the DQ outputs.
This value should be set according to the application’s requirements.
18
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x16, x32 Mobile SDRAM
©2006 Micron Technology, Inc. All rights reserved.
Register Definition

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