MT48H8M32LFB5-75 IT:H Micron Technology Inc, MT48H8M32LFB5-75 IT:H Datasheet - Page 6

• Manufacturer Part Number: MT48H8M32LFB5-75 IT:H
• Description: DRAM Chip Mobile SDRAM 256M-Bit 8Mx32 1.8V 90-Pin VFBGA Tray
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48H8M32LFB5-75 IT:H

• Density: 256 Mb
• Maximum Clock Rate: 133 MHz
• Package: 90VFBGA
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 1.8 V
• Maximum Random Access Time: 8|6 ns
• Operating Temperature: -40 to 85 °C
• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Package / Case: 90-VFBGA
• Organization: 8Mx32
• Address Bus: 14b
• Access Time (max): 8/6ns
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 100mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Functional Block Diagrams
Figure 2:
PDF:09005aef8219eeeb/Source: 09005aef8219eedd
256mb_x16_sdram_y36m_1.fm - Rev G 6/09 EN
A[12:0],
BA[1:0]
CAS#
RAS#
WE#
CKE
CLK
CS#
15
ADDRESS
REGISTER
16 Meg x 16 SDRAM
MODE REGISTER
EXT MODE
REGISTER
CONTROL
LOGIC
15
The 256Mb SDRAM is designed to operate in 1.8V low-power memory systems. An auto
refresh mode is provided, along with a power-saving deep power-down mode. All inputs
and outputs are LVTTL-compatible.
SDRAM offers substantial advances in DRAM operating performance, including the abil-
ity to synchronously burst data at a high data rate with automatic column-address gen-
eration, the ability to interleave between internal banks in order to hide precharge time,
and the capability to randomly change column addresses on each clock cycle during a
burst access.
COUNTER
REFRESH
13
9
2
13
ADDRESS
2
ROW-
MUX
COUNTER/
CONTROL
COLUMN-
ADDRESS
LATCH
LOGIC
BANK
13
DECODER
ADDRESS
BANK0
LATCH
ROW-
&
9
8192
6
READ DATA LATCH
DQM MASK LOGIC
(8192 x 512 x 16)
Sense amplifiers
WRITE DRIVERS
I/O GATING
DECODER
COLUMN
MEMORY
BANK0
ARRAY
(x16)
8192
256
Bank1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Bank2
Bank3
256Mb: x16, x32 Mobile SDRAM
BA1
0
0
1
1
Functional Block Diagrams
16
16
2
BA0
0
1
0
1
REGISTER
REGISTER
OUTPUT
INPUT
DATA
DATA
©2006 Micron Technology, Inc. All rights reserved.
Bank
0
1
2
3
2
16
UDQM,
LDQM
DQ[15:0]