XC5VSX95T-2FF1136I Xilinx Inc, XC5VSX95T-2FF1136I Datasheet - Page 228
![FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VSX95T-2FF1136I
Manufacturer Part Number
XC5VSX95T-2FF1136I
Description
FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VSX95T-2FF1136I
Package
1136FCBGA
Family Name
Virtex®-5
Device Logic Units
94208
Typical Operating Supply Voltage
1 V
Maximum Number Of User I/os
640
Ram Bits
8994816
Number Of Logic Elements/cells
94208
Number Of Labs/clbs
7360
Total Ram Bits
8994816
Number Of I /o
640
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1136-BBGA, FCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
HW-AFX-FF1136-500-G - BOARD DEV VIRTEX 5 FF1136
Number Of Gates
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VSX95T-2FF1136I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VSX95T-2FF1136I
Manufacturer:
XILXIN
Quantity:
20 000
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Chapter 6: SelectIO Resources
228
Driver with Termination to V
Figure 6-13
X-Ref Target - Figure 6-13
Some I/O standards, such as HSTL Class II, require an output termination to V
Figure
X-Ref Target - Figure 6-14
DCI can provide output termination to V
the impedance of the termination, but not the driver. Both HSTL and SSTL standards need
50 Ω external reference resistors. The DCI output standards supporting drivers with split
termination are shown in
Table 6-2: DCI Output Standards Supporting Split Termination
HSTL_II_DCI
HSTL_II_DCI_18
Figure 6-13: Driver with Termination to V
6-14).
illustrates a driver with single termination inside a Virtex-5 device.
Figure 6-14: Driver with Termination to V
DIFF_HSTL_II_DCI
DIFF_HSTL_II_DCI_18
Virtex-5 FPGA
www.xilinx.com
Table
CCO
6-2.
/2 (Split Termination)
IOB
V
Virtex-5 DCI
CCO
CCO
R
V
CCO
/2 using split termination. DCI only controls
IOB
R
SSTL2_II_DCI
SSTL18_II_DCI
/2
CCO
Using DCI Single Termination
UG190_c6_12_022609
UG190_6_11_021206
Z
Z
0
0
CCO
/2 without DCI
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
DIFF_SSTL2_II_DCI
DIFF_SSTL18_II_DCI
CCO
/2 (see
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