XC5VSX95T-2FF1136I Xilinx Inc, XC5VSX95T-2FF1136I Datasheet - Page 232
![FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA](/photos/6/73/67306/xilinx-_1136-fbga_sml.jpg)
XC5VSX95T-2FF1136I
Manufacturer Part Number
XC5VSX95T-2FF1136I
Description
FPGA Virtex®-5 Family 94208 Cells 65nm (CMOS) Technology 1V 1136-Pin FCBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 SXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VSX95T-2FF1136I
Package
1136FCBGA
Family Name
Virtex®-5
Device Logic Units
94208
Typical Operating Supply Voltage
1 V
Maximum Number Of User I/os
640
Ram Bits
8994816
Number Of Logic Elements/cells
94208
Number Of Labs/clbs
7360
Total Ram Bits
8994816
Number Of I /o
640
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1136-BBGA, FCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
HW-AFX-FF1136-500-G - BOARD DEV VIRTEX 5 FF1136
Number Of Gates
-
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC5VSX95T-2FF1136I
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC5VSX95T-2FF1136I
Manufacturer:
XILXIN
Quantity:
20 000
- XC5VLX30-1FFG324C PDF datasheet
- XC5VLX30-1FFG324C PDF datasheet #2
- XC5VLX30-1FFG324C PDF datasheet #3
- XC5VLX30T-1FFG665C_PRODUCT_CHANGE PDF datasheet #4
- Current page: 232 of 385
- Download datasheet (14Mb)
Chapter 6: SelectIO Resources
232
X-Ref Target - Figure 6-17
Recommended
Z 0
Conventional
DCI Transmit
Conventional
Receive
Conventional
Transmit
DCI Receive
DCI Transmit
DCI Receive
Bidirectional
Reference
Resistor
Notes:
1. The SSTL-compatible 25 Ω or 20 Ω series resistor is accounted for in the DCI buffer,
2. Z 0 is the recommended PCB trace impedance.
(2)
and it is not DCI controlled.
Figure 6-17: SSTL DCI Usage Examples
www.xilinx.com
25Ω
Virtex-5
Virtex-5
25Ω
DCI
SSTL2_I or SSTL18_I
DCI
(1)
VRN = VRP = R = Z 0
(1)
R/2
R/2
50 Ω
N/A
Z 0
Z 0
Z 0
Z 0
V
V
CCO
R
CCO
R
V
V
/2
CCO
/2
CCO
Virtex-5
Virtex-5
2R
2R
2R
2R
DCI
DCI
25Ω
25Ω
25Ω
Virtex-5
Virtex-5
SSTL2_II or SSTL18_II
(1)
(1)
Virtex-5
DCI
VRN = VRP = R = Z 0
DCI
(1)
V
DCI
V
CCO
2R
2R
2R
2R
V
V
CCO
R/2
CCO
CCO
V
R/2
2R
2R
CCO
R
/2
50 Ω
R
/2
Z 0
Z 0
Z 0
Z 0
Z 0
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
ug190_6_15_041106
V
V
R
R
CCO
CCO
V
2R
2R
Virtex-5 DCI
V
V
CCO
CCO
CCO
Virtex-5
/2
Virtex-5
2R
2R
/2
2R
DCI
2R
25Ω
DCI
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