ISPGDX160VA-3B208 LATTICE SEMICONDUCTOR, ISPGDX160VA-3B208 Datasheet - Page 24

• Manufacturer Part Number: ISPGDX160VA-3B208
• Description: Digital Crosspoint 208-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of ISPGDX160VA-3B208

• Package: 208FBGA
• Number Of Arrays: 1
• Power Supply Type: Dual
• Maximum Dual Supply Voltage: 3.6 V
• Minimum Dual Supply Voltage: 2.3|3 V
• Output Level: TTL

The ispGDXV/VA devices provide IEEE1149.1a test
capability and ISP programming through a standard
Boundary Scan Test Access Port (TAP) interface.
The boundary scan circuitry on the ispGDXV/VA Family
operates independently of the programmed pattern. This
Figure 10. Boundary Scan Register Circuit for I/O Pins
Table 3. I/O Shift Register Order
Table 4. ispGDX160V/VA Device ID Codes
Boundary Scan
ispGDX160V/VA
ispGDX160V
ispGDX160VA
DEVICE
DEVICE
(from previous
Shift DR
SCANIN
cell
TDI, TOE, Y2, Y3, RESET, Y1, Y0, I/O B20 .. B39, I/O C0 .. C39, I/O D0 .. D19, I/O B19 .. B0,
I/O A39.. A0, I/O D39 .. D20, TDO
0000, 0000, 0011, 0101, 0011, 0000, 0100, 0011
0001, 0000, 0011, 0101, 0011, 0000, 0100, 0011
Clock DR
32-BIT BOUNDARY SCAN ID CODE
Registers
D
D
D
BSCAN
Q
Q
Q
Update DR
D
D
BSCAN
Latches
I/O SHIFT REGISTER ORDER
ID Code/GDX160V/VA
Q
Q
Specifications ispGDX160V/VA
23
Reset
PROG_MODE
allows customers using boundary scan test to have full
test capability with only a single BSDL file.
The ispGDXV/VA devices are identified by the 32-bit
JTAG IDCODE register. The device ID assignments are
listed in Table 4.
EXTEST
EXTEST
TOE
Function
Function
Normal
Normal
HIGHZ
OE
SCANOUT
(to next cell)
0
1
0
1
I/O Shift Reg Order/ispGDXVA
I/O Pin