ISPGDX160VA-3B208 LATTICE SEMICONDUCTOR, ISPGDX160VA-3B208 Datasheet - Page 25

• Manufacturer Part Number: ISPGDX160VA-3B208
• Description: Digital Crosspoint 208-Pin FBGA
• Manufacturer: LATTICE SEMICONDUCTOR

Specifications of ISPGDX160VA-3B208

• Package: 208FBGA
• Number Of Arrays: 1
• Power Supply Type: Dual
• Maximum Dual Supply Voltage: 3.6 V
• Minimum Dual Supply Voltage: 2.3|3 V
• Output Level: TTL

The ispJTAG programming is accomplished by execut-
ing Lattice private instructions under the Boundary Scan
State Machine.
Details of the programming sequence are transparent to
the user and are handled by Lattice ISP Daisy Chain
Figure 11. Boundary Scan Register Circuit for Input-Only Pins
Figure 12. Boundary Scan State Machine
Boundary Scan (Continued)
0
1
Run-Test/Idle
Test-Logic-Reset
(from previous
Clock DR
0
SCANIN
Shift DR
Input Pin
cell
1
1
0
1
Select-DR-Scan
Capture-DR
Update-DR
Exit2-DR
Exit1-DR
Pause-DR
Shift-DR
0
0
0
1
1
1
Specifications ispGDX160V/VA
0
24
Downlowad (ispDCD™), ispCODE ‘C’ routines or any
third-party programmers. Contact Lattice Technical Sup-
port to obtain more detailed programming information.
1
D
0
0
1
Q
0
1
Select-IR-Scan
1
SCANOUT
(to next cell)
Capture-IR
Pause-IR
Update-IR
Exit1-IR
Shift-IR
Exit2-IR
0
0
1
0
1
1
0
1
0
0
1