MT46V32M16P-5B:F Micron Technology Inc, MT46V32M16P-5B:F Datasheet - Page 63

• Manufacturer Part Number: MT46V32M16P-5B:F
• Description: DRAM Chip DDR SDRAM 512M-Bit 32Mx16 2.6V 66-Pin TSOP Tray
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V32M16P-5B:F

• Density: 512 Mb
• Maximum Clock Rate: 400 MHz
• Package: 66TSOP
• Address Bus Width: 15 Bit
• Operating Supply Voltage: 2.6 V
• Maximum Random Access Time: 0.7 ns
• Operating Temperature: 0 to 70 °C
• Format - Memory: RAM
• Memory Type: DDR SDRAM
• Memory Size: 512M (32Mx16)
• Speed: 5ns
• Interface: Parallel
• Voltage - Supply: 2.5 V ~ 2.7 V
• Package / Case: 66-TSOP
• Organization: 32Mx16
• Address Bus: 15b
• Access Time (max): 700ps
• Operating Supply Voltage (typ): 2.6V
• Package Type: TSOP
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.5V
• Supply Current: 215mA
• Pin Count: 66
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 28:
PDF: 09005aef80a1d9d4/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 512Mb DDR: Rev. N; Core DDR Rev. B 2/09 EN
Command
Command
Command
Address
Address
Address
Consecutive READ Bursts
DQS
DQS
DQS
CK#
CK#
CK#
DQ
DQ
DQ
CK
CK
CK
Notes:
Bank,
READ
Col n
Bank,
READ
Bank,
READ
Col n
Col n
T0
T0
T0
1. DO n (or b) = data-out from column n (or column b).
2. BL = 4 or BL = 8 (if BL = 4, the bursts are concatenated; if BL = 8, the second burst interrupts
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Three (or seven) subsequent elements of data-out appear in the programmed order follow-
5. Shown with nominal
6. Example applies only when READ commands are issued to same device.
the first).
ing DO b.
CL = 2
NOP
NOP
NOP
T1
T1
T1
CL = 2.5
CL = 3
t
AC,
Bank,
Bank,
Bank,
READ
Col b
READ
Col b
READ
Col b
T2
T2
T2
t
DQSCK, and
63
DO
n
T2n
T2n
DO
n
T3
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3
NOP
T3
NOP
t
DQSQ.
DO
n
T3n
T3n
T3n
512Mb: x4, x8, x16 DDR SDRAM
Transitioning Data
T4
NOP
T4
T4
NOP
NOP
DO
b
T4n
T4n
T4n
DO
©2000 Micron Technology, Inc. All rights reserved.
b
T5
T5
T5
NOP
NOP
NOP
DO
Don’t Care
b
T5n
T5n
T5n
Operations