TSEV81102G0TPZR3 E2V, TSEV81102G0TPZR3 Datasheet - Page 28

• Manufacturer Part Number: TSEV81102G0TPZR3
• Manufacturer: E2V

Specifications of TSEV81102G0TPZR3

• Lead Free Status / RoHS Status: Not Compliant

6.4
6.4.1
6.4.2
6.4.3
28
Thermal and Moisture
Characteristics
TS81102G0
Thermal Resistance from Junction to Case: RTHJC
Thermal Resistance from Junction to Ambient: RTHJA
Thermal Resistance from Junction to Bottom of Balls
The Rth from junction to case for the TBGA package is estimated at 1.05°C/W that can be bro-
ken down as follows:
A pin-fin type heat sink of a size 40 mm x 40 mm x 8 mm can be used to reduce thermal resis-
tance. This heat sink should not be glued to the top of the package as Atmel cannot guarantee
the attachment to the board in such a configuration. The heat sink could be clipped or screwed
on the board.
With such a heat sink, the Rthj-a is about 6°C/W (if we take 10°C/W for Rth from the junction to
air through the package and heat sink in parallel with 15°C/W from the junction to the board
through the package body, through balls and through board copper).
Without the heat sink, the Rth junction to air for a package reported on-board can be estimated
at 13 to 20°C/W (depending on the board used).
The worst value 20°C/W is given for a 1-layer board (13°C for a 4-layer board).
The thermal resistance from the junction to the bottom of the balls of the package corresponds
to the total thermal resistance to be considered from the silicon’s die junction to the interface
with a board. This thermal resistance is estimated to be 4.8°C/W max.
The following diagram points out how the previous thermal resistances were calculated for this
packaged device.
• Silicon: 0.1°C/W
• Die attach epoxy: 0.5°C/W (thickness # 50 µm)
• Copper block (back side of the package): 0.1°C/W
• Black Ink: 0.251°C/W.
2105D–BDC–07/05