TSEV81102G0TPZR3 E2V, TSEV81102G0TPZR3 Datasheet - Page 35

• Manufacturer Part Number: TSEV81102G0TPZR3
• Manufacturer: E2V

Specifications of TSEV81102G0TPZR3

• Lead Free Status / RoHS Status: Not Compliant

Figure 10-2. Synchronous Reset Operation in DR Mode, 1:4 ratio, 750 MHz (Full-speed) – TIMINGS
Note:
If the reset rising edge had occurred in the second allowed window, the reset would have been effective on the third clock
rising edge (not represented, on the right of the edge represented with the arrow).
Figure 10-3. Synchronous Reset Operation in DR Mode, 1:8 ratio, 1.5 GHz (Full-speed) – Principle of Operation
Figure 10-4. Synchronous Reset Operation in DR Mode, 1:8 ratio, 1.5 GHz (Full-speed) – Timings
Note:
If the reset rising edge had occurred in the second allowed window, the reset would have been effective on the fourth clock
rising edge (last clock rising edge, on the right of the edge represented with the arrow).
This case is the most critical one with only a 300 ps window for the reset.
2105D–BDC–07/05
Sync_RESET
Sync_RESET
Time Zones
Times Zones
Allowed for
Allowed for
the reset
the reset
The clock edge to which the reset applies is the one identified by the arrow.
The clock edge to which the reset applies is the one identified by the arrow.
Sync_RESET
Fs
Fs
Fs
666.6 ps
5.32 ns
1.333 ns
333 ps
667 ps
TS81102G0
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