IDT77V126L200TFI IDT, Integrated Device Technology Inc, IDT77V126L200TFI Datasheet - Page 18
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IDT77V126L200TFI
Manufacturer Part Number
IDT77V126L200TFI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT77V126L200TFI.pdf
(30 pages)
Specifications of IDT77V126L200TFI
Number Of Channels
1
Type Of Atm Phy Interface
UTOPIA
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Pin Count
64
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
256Mbps for extended periods of time (64 hours) and no bit errors were seen.
Line Side (Serial) Interface
PHY to Magnetics Interface
ated in order to meet the launch amplitude specified by the standards. The external receive circuitry is designed to attenuate low frequencies in order
to compensate for the high frequency attenuation of the cable.
false signals in the absence of a real signal. This can be important because the 77V126L200 does not disable error detection or interrupts when an
input signal is not present.
the recommended magnetics.
IDT77V126L200
From the above measurements taken, the amount of jitter being added at each TX point is not significant. These tests were also run at line rates of
A standard connection to 100 and 120 unshielded twisted pair cabling is shown in Figure 16. Note that the transmit signal is somewhat attenu-
Also, the receive circuitry biases the positive and negative RX inputs to slightly different voltages. This is done so that the receiver does not receive
When connecting to UTP at 51.2Mbps and 204.8Mbps, it is necessary to use magnetics with sufficient bandwidth. Refer to Table 5 on page 20 for
Jitter at 256Mbps at point 4 with respect to point 1
Jitter at 102.4Mbps at point 4 with respect to point 1
18 of 30
Jitter at 102.4Mbps at point 5 with respect to point 1
Jitter at 256Mbps at point 5 with respect to point 1
December 2004