IDT77V126L200TFI IDT, Integrated Device Technology Inc, IDT77V126L200TFI Datasheet - Page 22
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IDT77V126L200TFI
Manufacturer Part Number
IDT77V126L200TFI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT77V126L200TFI.pdf
(30 pages)
Specifications of IDT77V126L200TFI
Number Of Channels
1
Type Of Atm Phy Interface
UTOPIA
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Pin Count
64
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
LED Driver and HEC Status/Control Register
Address: 0x03
Low Byte Counter Register [7:0]
Address: 0x04
High Byte Counter Register [15:8]
Address: 0x05
Counter Select Register
Address: 0x06
IDT77V126L200
7
6
5
4,3 R/W
2
1
0
[7:0] R
[7:0] R
7
6
5
4
3
2
1
0
Bit Type
Bit Type
Bit Type
Bit Type
Note: For proper operation, only one bit may be set in the Counter Selected Register at any time.
R
R/W
R/W
R
R
R
—
—
—
—
W
W
W
W
0
0 = enable
checking
0 = enable calcu-
late & replace
00 = 1 cycle
1 = empty
1
1
0x00
0x00
0
0
0
0
0
0
0
0
Initial State
Initial State
Initial State
Initial State
Provides low-byte of counter value selected via the Counter Select Register.
Provides high-byte of counter value selected via the Counter Select Register.
Receive Hec Error Counter
Reserved
Disable Receive HEC Checking (HEC Enable)
When not set, the HEC is calculated on first 4 bytes of received cell, and compared against the 5th byte. When set (=
1), the HEC byte is not checked.
Disable Transmit HEC Calculate & Replace
When set, the 5th header byte of cells queued for transmit is not replaced with the HEC calculated across the first four
bytes of that cell.
RxREF Pulse Width Select
bit # 4
Transmit FIFO Status 1 = TxFIFO empty
TxLED Status
RxLED Status 0 = Cell Received
Reserved
Reserved
Reserved
Reserved
Symbol Error Counter
Tx Cell Counter
Rx Cell Counter Does not count HEC errored cells. even when bit 6 of the Master Control Register is Cleared.
0
0
1
1
0
1
0
1
3
RxREF active for 1 cycle of the recovered clock
RxREF active for 2 cycles of the recovered clock
RxREF active for 4 cycles of the recovered clock
RxREF active for 8 cycles of the recovered clock
0 = Cell Transmitted
22 of 30
1 = Cell Not Received
1 = Cell Not Transmitted
0 = TxFIFO not empty
Function
Function
Function
Function
December 2004