IDT77V126L200TFI IDT, Integrated Device Technology Inc, IDT77V126L200TFI Datasheet - Page 27
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IDT77V126L200TFI
Manufacturer Part Number
IDT77V126L200TFI
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT77V126L200TFI.pdf
(30 pages)
Specifications of IDT77V126L200TFI
Number Of Channels
1
Type Of Atm Phy Interface
UTOPIA
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Pin Count
64
Mounting
Surface Mount
Lead Free Status / RoHS Status
Not Compliant
Utility Bus Read Cycle
Tas
Tcsrd
Tah
Tapw
Ttria
Trdpw
Tdh
Tch
Ttrid
Trd
Tar
Trdd
Name
IDT77V126L200
AD[7:0]
10
0
5
10
0
20
0
0
—
—
5
0
(output)
AD[7:0]
ALE
Min
WR
AD[7:0]
CS
(input)
ALE
RD
CS
—
—
—
—
—
—
—
—
10
18
—
—
Max
MHz
%
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
Address setup to ALE
Chip select to read enable
Address hold to ALE
ALE min pulse width
Address tri-state to RD assert
Min. RD pulse width
Data Valid hold time
RD deassert to CS deassert
RD deassert to data tri-state
Read Data access
ALE low to start of read
Start of read to Data low-Z
Address
Tas
Tapw
Description
Tas
Tapw
Address
Figure 19 Utility Bus Read Cycle
Figure 20 Utility Bus Write Cycle
Tah
Tcswr
Tah
Tcsrd
Tar
27 of 30
Utility Bus Write Cycle
Tapw
Tas
Tah
Tcswr
Twrpw
Tdws
Tdwh
Tch
Taw
Name
Taw
Trdd
Twrpw
Tdws
10
10
5
0
20
20
10
0
20
Min
Data (input)
Trdpw
Trd
—
—
—
—
—
—
—
—
—
Max
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
ALE min pulse widt
Address set up to ALE
Address hold time to ALE
CS Assert to WR
Write Data set up
Write Data hold time
WR deassert to CS deassert
ALE low to end of write
Min. WR pulse width
Data
Tdwh
Tch
Tch
Description
Ttrid
December 2004
Tdh
3505 drw 44
3505 drw 43