TLE6266G Infineon Technologies, TLE6266G Datasheet
TLE6266G
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TLE6266G Summary of contents
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Integrated LS CAN, LDO and itc hes Automotive and Industrial D a ...
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... Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-support device or system affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body support and/or maintain and sustain and/or protect human life ...
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System Basis Chip Datasheet 1 Features • Standard Fault Tolerant differential CAN-Transceiver • Bus Failure Management • Low current consumption mode < 70µA • CAN Data Transmission Rate up to 125 kBaud • Low-Dropout Voltage Regulator 5V ± 2% • ...
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Pin Configuration (top view ...
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Pin Definitions and Functions Pin No. Symbol Function 1 CANH CAN-H bus line; HIGH in dominant state 2 RTH CANH-Termination input; connected to CANH via external termination resistor 3 RO Reset output; open drain output; integrated pull up; active ...
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Pin Definitions and Functions (cont’d) Pin No. Symbol Function 18 DI SPI interface Data In; DI receives serial data from the control device. Serial data transmitted bit control word with the Least Significant Bit ...
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Functional Block Diagram Charge Pump UVLO Band Gap Vs Vcc RTL CANH H Output Stage CANL L Output Stage RTH Filter Figure 2 TLE 6266 G Functional Block Diagram Version 2.21 Dri v e Dri v ...
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Circuit Description The TLE 6266 monolithic IC, which incorporates a failure tolerant low speed CAN- transceiver for differential mode data transmission, a low dropout voltage regulator for internal and external 5V supply as well as a ...
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Mode V bat In the stand-by mode the CAN transmitter and receiver stage are deactivated bat achieve a low power consumption. All other functions are active as in the normal mode (see Table 3). The CANL line ...
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Power Down Normal Mode all functions active SPI RxD-Only SPI all functions active Cyclic Wake Cyclic HS OFF OFF/ON cc RTL = 12V WD = OFF SPI HS3 = ...
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Table 3 Operation mode table Feature Normal mode LDO ON Reset ON Watchdog ON SPI ON Oscillator ON CAN transmit ON CAN receive OUTHS PWM HS1 OUTHS ...
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LS CAN Transceiver The CAN transceiver TLE 6266 works as the interface between the CAN protocol controller and the physical CAN bus-lines. Figure 4 shows the principle configuration of a CAN network. Controller 1 RxD1 Transceiver1 Figure 4 CAN ...
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EME performance of the system is degraded from the differential mode. 1 Figure 5 Testing the Bus Connection in Receive-only Mode 6.3 Bus Failure Management There are 9 different CAN ...
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The SPI output bit 0 for CAN bus wiring failure can be read out without SPI transmission directly via the CSN pin (CSN=LOW). A transition of the CSN pin signal from LOW to HIGH resets the SPI diagnosis bit 0.. ...
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In order to protect the transceiver output stages from being damaged by shorts on the bus lines, current limiting circuits are integrated. The CANL and CANH output stage respectively are protected by an additional temperature sensor, that disables them as ...
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Load gets activated Vcc 5 4 Charge Diagram Figure 6 LDO activation flowchart for the cyclic wake HS OFF mode 6.6 3V-Supervisor This feature is useful e.g. to monitor that the RAM data of the microcontroller might be damaged (prewarning) ...
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The transmission cycle begins when the chip is selected by the chip select not input CSN (H to L). After the CSN input returns from the word that has been read in becomes the new control word. ...
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SPI CLK Monitoring during Cyclic Wake Mode The TLE 6266 offers a feature to monitor the SPI clock signal (CLK pin) during the cyclic wake mode. If there are edges on the CLK signal, the IC performs a reset and ...
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Watchdog Trigger Failure If the trigger signal does not meet the open window a watchdog reset is created by setting the reset output RO low for t long open window. In addition, the SPI output bit 2 is set HIGH ...
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HS ON mode. The autotiming period is programable via SPI (see Table 2).This has to be done, to minimize the current consumption depending on the cyclic wake time (see Figure 21). In the ...
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LED after a certain number of cyclic HS ON conditions). During the long open window the timebase test is not available. To measure the internal cyclic timing, the SPI input bit 3 ...
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Explanation of the Mode Transitions To better understand the description, the reader has to be familiar with the Chapter 6. All descriptions are starting from the normal mode, as the main operation mode. This means, the component was powered ...
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Mode State Normal Mode Normal Mode Cyclic HS ON CSN, SPI word* SPI SPI normal cyclic HS mode ON Watchdog trigger bit =SPI bit0** Window watchdog*** closed open closed open long open window window window window window HS3 PWM Vs ...
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Mode State Normal Mode Normal Mode Cyclic HS ON CSN, SPI word* SPI SPI normal cyclic HS mode ON Watchdog trigger bit =SPI bit0** Window watchdog*** closed open closed open long open window window window window window HS3 PWM Wake ...
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Mode State Normal Mode Normal Mode Cyclic HS ON CSN, SPI word* SPI SPI norm al cyclic HS mode ON W atchdog trigger bit =SPI bit0** W indow watchdog*** closed open closed open long open window window window window window ...
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Electrical Characteristics 8.1 Absolute Maximum Ratings Parameter Voltages Supply voltage Supply voltage Regulator output voltage CAN input voltage (CANH, CANL) CAN input voltage (CANH, CANL) Transient voltage at CANH and CANL Logic input voltages ( DI, CLK, CSN, WK, ...
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Absolute Maximum Ratings (cont’d) Parameter Temperatures Junction temperature Storage temperature 1) Not subject to production test - specified by design Note: Maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated ...
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Operating Range (cont’d) Parameter Supply voltage Supply voltage slew rate Supply voltage increasing Supply voltage decreasing Logic input voltage (DI, CLK, CSN, PWM, TxD ) Output current Output capacitor SPI clock frequency Junction temperature Thermal Resistances Junction pin Junction ...
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Electrical Characteristics < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter V ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Electrical Characteristics (cont’ < < -100 A; normal mode; all outputs open; – < transceiver circuitry: – < defined flowing into pin; unless otherwise specified. Parameter ...
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Timing Diagrams CSN High to Low & rising edge of CLK enabled. Status information is transfered to Output Shift Register CSN CSN Low to High: Data from Shift-Register is transfered to Output Power Switches CLK 0 1 ...
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Figure 12 SPI-Input Timing Figure 13 Turn OFF/ON Time Version 2.21 Datasheet TLE 6266 G 43 July 29th, 2005 ...
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Figure 14 DO Valid Data Delay Time and Valid Time Figure 15 DO Enable and Disable Time Version 2.21 Datasheet TLE 6266 G 44 July 29th, 2005 ...
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SPI input bit PWM (SPI input H bit HS- Switch1 ON OFF Figure 16 High Side Switch1 Timing Diagram Vbat stand-by Cyclic mode Wake ON OFF PWM H L HS- Switch3 ON OFF ...
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Figure 18 Watchdog Timeout Definitions Trigger Reset Out Watchdog timer reset normal operation Figure 19 Watchdog Timing Diagram Version 2. open window t t ...
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Vcc Trigger Reset Out Watchdog timer reset SPI output start up bit 2 HIGH LOW activation by microcontroller Figure 20 Reset Timing Diagram Figure ...
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13.5 V 100 nF Figure 22 Timing Test Circuit Version 2.21 RTH R 1 CANH CANL R RTL 1 OUTL1 OUTL2 OUTH1 OUTH2 OUTH3 GND +VS 48 Datasheet TLE 6266 G RxD ...
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Application µ Figure 23 Application Circuit Version 2.21 +V CSN S CLK DI CANH DO CANL TxD RxD RTH PWM RTL RO OUTL2 Vcc OUTL1 OUTH3 OUTH2 WK OUTH1 GND TLE 6266 G 49 ...
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Package Outlines P-DSO-28-18 (Plastic Dual Small Outline Package) Figure 24 The P-DSO-28-6 package Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. Version 2.21 Datasheet TLE 6266 G 50 Dimensions in ...