FIN1022M_NL Fairchild Semiconductor, FIN1022M_NL Datasheet - Page 2
![](/photos/31/30/313062/16pin_soic_sml.jpg)
FIN1022M_NL
Manufacturer Part Number
FIN1022M_NL
Description
Manufacturer
Fairchild Semiconductor
Datasheet
1.FIN1022M_NL.pdf
(10 pages)
Specifications of FIN1022M_NL
Array Configuration
2x2
Number Of Arrays
1
Differential Data Transmission
Yes
Power Supply Requirement
Single
Operating Supply Voltage (typ)
3.3V
Package Type
SOIC N
Pin Count
16
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Cascading Capability
No
On-chip Buffers
No
On-chip Decoder
No
On-chip Latch Circuit
No
On-chip Mux/demux
Yes
Programmable
No
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Lead Free Status / RoHS Status
Compliant
www.fairchildsemi.com
Connection Diagram
Function Table
Function Diagrams
O
OPEN
SEL
L / O
L / O
L / O
H
H
X
X
H
X
0
L / O
SEL
L / O
L / O
L / O
H
H
H
X
X
X
Inputs
1
LOW or OPEN
L / O
L / O
L / O
EN
H
H
H
H
H
H
0
L / O
L / O
L / O
EN
H
H
H
H
H
H
H
1
HIGH Logic Level
D
R
R
R
R
R
R
OUT0
IN0
IN0
IN1
IN1
IN0
IN1
Z
Z
Z
D
R
R
R
R
R
R
OUT0
IN0
IN0
IN1
IN1
IN0
IN1
Z
Z
Z
2
Outputs
Pin Descriptions
L
R
R
D
D
EN
EN
SEL
SEL
V
GND
CC
IN0
IN0
OUT0
OUT0
LOW Logic Level
Pin Name
0
1
D
0
1
R
R
R
R
R
R
OUT1
, R
, R
IN0
IN1
IN0
IN1
IN0
IN1
Z
Z
Z
, D
, D
IN1
IN1
OUT1
OUT1
D
R
R
R
R
R
R
OUT1
IN0
IN1
IN0
IN1
IN0
IN1
Z
Z
Z
LVDS non-inverting data inputs
LVDS inverting data inputs
LVDS non-inverting data outputs
LVDS inverting data outputs
LVTTL input for enabling D
LVTTL input for enabling D
LVTTL input for selecting R
R
LVTTL input for selecting R
R
Power Supply
Ground
IN1
IN1
X
1:2 Splitter
Repeater
Switch
1:2 Splitter
D
D
D
D
D
/R
/R
OUT0
OUT0
OUT1
OUT1
OUT0
Don’t Care
IN1
IN1
Disabled
Disabled
Disabled
Disabled
and D
for output D
for output D
Description
Mode
OUT1
Z
Disabled
OUT0
OUT1
High Impedance
OUT0
OUT1
IN0
IN0
/D
/D
/R
/R
OUT0
OUT1
/D
/D
IN0
IN0
OUT0
OUT1
or
or