82P2281PFG8 IDT, Integrated Device Technology Inc, 82P2281PFG8 Datasheet - Page 153
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82P2281PFG8
Manufacturer Part Number
82P2281PFG8
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.82P2281PFG8.pdf
(371 pages)
Specifications of 82P2281PFG8
Number Of Transceivers
1
Screening Level
Industrial
Mounting
Surface Mount
Package Type
TQFP
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Lead Free Status / RoHS Status
Compliant
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T1/J1 RBIF Mode (047H)
MAP[1:0]:
RMODE:
align the data output on the RSD pin are received from the line side.
align the data output on the RSD pin are provided by the system side.
Programming Information
IDT82P2281
Bit Name
Default
Bit No.
Type
In Receive Clock Slave mode and Receive Multiplexed mode, these 2 bits select the T1/J1 to E1 format mapping schemes.
In Receive Non-multiplexed mode, this bit selects the sub-mode.
= 0: The Receive System Interface is operated in Receive Clock Master mode. The timing signal for clocking the data and the framing pulse to
= 1: The Receive System Interface is operated in Receive Clock Slave mode. The timing signal for clocking the data and the framing pulse to
7
Note:
* These 2 bits can not be set to ‘00’ in the Receive Multiplexed mode.
6
MAP[1:0]
0 0 *
0 1
1 0
1 1
Reserved
5
T1/J1 Mode E1 Rate per One Filler Every Four CHs
T1/J1 Mode E1 Rate per Continuous CHs
T1/J1 To E1 Format Mapping Schemes
T1/J1 Mode E1 Rate per G.802
4
153
T1/J1 Rate
SINGLE T1/E1/J1 LONG HAUL / SHORT HAUL TRANSCEIVER
3
MAP1
R/W
2
0
MAP0
R/W
1
0
August 20, 2009
RMODE
R/W
0
1
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