CY7C955-NC Cypress Semiconductor Corp, CY7C955-NC Datasheet - Page 17

• Manufacturer Part Number: CY7C955-NC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C955-NC

• Lead Free Status / RoHS Status: Not Compliant

SONET Overhead Description
A1, A2
C1
B1
H1, H2
H3
B2
K2
Z2
B3
C2
G1
H4
Signal Values
The frame alignment bytes mark the beginning of a SONET frame. They are transmitted every 125
into the transmitted stream at the beginning of every frame. These bytes are not scrambled by the
frame synchronous SONET scrambler. Receive Side: The receiver will search for and frame onto
the incoming A1, A2 bytes.
This is the identification byte for the STS data stream. Transmit Side: In OC 1, C1 is transmitted as
OH. In OC 3c, the sequence C1, C1, C1 of every frame is transmitted as 01
bytes are not scrambled by the frame-synchronous SONET scrambler. Receive side: The receiver
will ignore C1.
This is the section bit interleave parity byte. Transmit Side: B1 is calculated using the BIP 8 algorithm
described in I.432. It is inserted into the SONET data stream before the frame synchronous SONET
scrambler. Receive Side: Received B1 error events are accumulated in the SBE [15:0] (Reg 12H
and Reg 13H).
These are the pointer value byte. These bytes are used to locate the beginning of the Synchronous
Payload Envelope (SPE) in the SONET/SDH frame. Transmit side: H1, H2 contains the normal new
data flag (0110) together with 522 (decimal) as the fixed pointer value field. The concatenation
indication byte is also inserted (H1* = 93, H2* = FF). Receive Side: H1 and H2 are used to locate
the beginning of the SPE. If a valid pointer cannot be found, CY7C955 will indicate a Loss of Pointer
State. Path AIS is detected by an all-ones pattern in H1 and H2 bytes.
This is the pointer action byte. Transmit Side: H3 will be all zeroes. Receive Side: Synchronous
Payload Data will be stuffed in the H3 byte if a negative stuff event occurs. This byte is ignored
otherwise.
This is the line bit interleaved parity bytes, it is used to monitor line errors. Transmit Side: B2 is
calculated over all bits of the line overhead and the SPE capacity of the previous frame before the
frame is being scrambled. The B2 byte itself is then placed in the current frame before scramble.
This is the identity line layer maintenance signal. Transmit Side: Bits 6, 7, and 8 of this byte are ‘110’
before scrambling when Line Remote Defect Indication is true. The whole of K2 is an all-one pattern
before scrambling if Line AIS is inserted. Receive Side: Bits 6, 7, and 8 of the K2 byte are being
examined to determine the presence of AIS, and RDI signals. Access to APs registers will be
available in future revisions.
This is the growth byte. It is used to provide far end block error function useful for remote performance
monitoring. Transmit Side: The number of B2 errors detected in the last frame is inserted. Z2 is a
number from 0 24 indicating 0 24 errors. Receive Side: A legal (0 24) Z2 number will be added to
the line FEBE counter.
This is the interleaved parity byte. Transmit Side: B3 is calculated over all bits of the SPE of the
previous frame before scrambling and is placed in the current frame before scrambling. This provides
path error monitoring capability for the link. Receive Side: The value in B3 is accumulated in a
register.
This is the path signal label byte for indicating the contents of the SONET payload. Transmit Side:
It’s fixed value is 13H. This indicates the payload is ATM. Receive Side: The receive side expects
C2 to be 13H. If the data is not 13H for 3 consecutive frames, an interrupt (if enabled) will be
generated.
This is the path status byte. Transmit Side: Path remote defect Indication (Path RDI) together with
the number of B3 errors in the last frame are inserted into G1 before scrambling for transmission.
G1 is a number from 0 8, indicating 0 8 errors. Receive side: A legal G1 value (0 8) will be accu-
mulated in the FEBE counter. Path remote defect indication is also detected through this byte.
This is the cell offset byte. Transmit Side: This byte indicates the offset in bytes between the H4 byte
and the first cell byte after H4. Receive Side: H4 byte is ignored.
s in both OC 1 and OC3c speeds. Transmit Side: In OC 1, A1(F6
PRELIMINARY
17
Description
H
) and A2 (28
H
, 02
H
H
) are inserted
, 03
CY7C955
H
. These