CY7C955-NC Cypress Semiconductor Corp, CY7C955-NC Datasheet - Page 19

• Manufacturer Part Number: CY7C955-NC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C955-NC

• Lead Free Status / RoHS Status: Not Compliant

CY7C955 Register Map
RESET
This is the master reset bit. Toggling this register has the same effect as toggling the RSTB pin, except that RSTB will reset all
registers to their default values, while writing a 1 to this register will only reset all other registers (but not itself) to their default
values. Leaving a 1 in this register puts the AX in power-down mode.
0:
1:
TYPE[2:0]
These bits differentiate the AX with other Cypress products.
ID[3:0]
These bits show the revision number of the CY7C955.
Reg 55H
Reg 56H
Reg 57H
Reg 58H
Reg 59H
Reg 60H
Reg 61H
Reg 62H
Reg 63H
Reg 64H
Reg 65H
Reg 66H
Reg 67H
Reg 80H
REG 00H
7
6
5
4
3
2
1
0
BIT POSITION
Normal mode.
Reset / Power Down Mode.
Address
RESET
TYPE[2]
TYPE[1]
TYPE[0]
ID[3]
ID[2]
ID[1]
ID[0]
Master Reset / Type / Identity Register
Receive ATM Cell Processor Uncorrectable HCS Error Count Register
Receive ATM Cell Processor Receive Cell Counter Register
Receive ATM Cell Processor Receive Cell Counter Register
Receive ATM Cell Processor Receive Cell Counter Register
Receive ATM Cell Processor Receive Configuration Register
Transmit ATM Cell Processor Control and Status Register
Transmit ATM Cell Processor Unassigned Cell Header Register
Transmit ATM Cell Processor Unassigned Cell Payload Register
Transmit ATM Cell Processor FIFO Control Register
Transmit ATM Cell Processor Transmit Cell Counter Register
Transmit ATM Cell Processor Transmit Cell Counter Register
Transmit ATM Cell Processor Transmit Cell Counter Register
Transmit ATM Cell Processor Transmit Configuration Register
CY7C955 Test Control Register
(continued)
PRELIMINARY
NAME
19
Register
R/W
R
R
R
R
R
R
R
READ/WRITE
0
0
1
1
1
1
1
1
CY7C955
DEFAULT