CY7C955-NC Cypress Semiconductor Corp, CY7C955-NC Datasheet - Page 50

• Manufacturer Part Number: CY7C955-NC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C955-NC

• Lead Free Status / RoHS Status: Not Compliant

REG
7
6
5
4
3
2
1
0
UHCS[7:0]
Reg 54H and Reg 55H will load the number of uncorrectable HCS errors from an internal counter approximately 200 ns after
a write operation is done to Reg 54H, Reg 55H, or Reg 00H. At that time (200 ns after the write operation), this register is
updated and the internal uncorrectable HCS error counter is reset to zero to begin another round of error accumulation. Reading
Reg 54H and Reg.–55H after the write yields the number of uncorrectable HCS errors accumulated since the counter was last
reset, if overflow has not occurred.
REG
7
6
5
4
3
2
1
0
RCELL[18:0]
Reg 56H, Reg 57H, and Reg 58H will load the number of cells received from an internal counter approximately 200ns after
a write operation is done to Reg 54H, Reg 55H, Reg 56H, Reg 57H, Reg 58H, or Reg 00H. At that time (200ns after the
write operation), this register is updated and the internal receive cell counter is reset to zero to begin another round of accu-
mulation. Reading Reg 56H, Reg 57H, and Reg 58H after the write yields the number of cells received since the counter was
last reset, if overflow has not occurred.
BIT POSITION
BIT POSITION
55H
56H
Receive ATM Cell Processor Uncorrectable HCS Error Count Register
UHCS[7]
UHCS[6]
UHCS[5]
UHCS[4]
UHCS[3]
UHCS[2]
UHCS[1]
UHCS[0]
Receive ATM Cell Processor Receive Cell Counter Register
RCELL[7]
RCELL[6]
RCELL[5]
RCELL[4]
RCELL[3]
RCELL[2]
RCELL[1]
RCELL[0]
PRELIMINARY
NAME
NAME
50
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
READ/WRITE
READ/WRITE
CY7C955
DEFAULT
DEFAULT