CY7C955-NC Cypress Semiconductor Corp, CY7C955-NC Datasheet - Page 26

• Manufacturer Part Number: CY7C955-NC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C955-NC

• Lead Free Status / RoHS Status: Not Compliant

REG
7
6
5
4
3
2
1
0
DDS
This bit controls whether SONET descrambling is done on the receive data stream.
0:
1:
FOOF
This bit can be used to manually put the Receive Section Overhead Processor out of frame.
0:
1:
BIPEE
This bit controls whether a section BIP 8 error (B1) generates an interrupt.
0:
1:
LOSE
This bit controls whether a Loss of Signal alarm generates an interrupt.
0:
1:
LOFE
This bit controls whether a Loss of Frame alarm generates an interrupt.
0:
1:
OOFE
This bit controls whether an Out of Frame alarm generates an interrupt.
0:
1:
BIT POSITION
Descrambling is performed.
Descrambling is not performed.
No action.
The Receive Section Overhead Processor will detect an out of frame alarm at the next frame boundary.
The interrupt pin, INTB, is not affected by section BIP 8 errors.
The interrupt pin, INTB, will go LOW upon receiving a section BIP 8 error.
The interrupt pin, INTB, is not affected by the loss of signal alarm.
The interrupt pin, INTB, will go LOW upon receiving a loss of signal alarm.
The interrupt pin, INTB, is not affected by the loss of frame alarm.
The interrupt pin, INTB, will go LOW upon receiving a loss of frame alarm.
The interrupt pin, INTB, is not affected by the out of frame alarm.
The interrupt pin, INTB, will go LOW upon receiving an out of frame alarm.
10H
Receive Section Overhead Processor Control Register
Unused
DDS
FOOF
Unused
BIPEE
LOSE
LOFE
OOFE
PRELIMINARY
NAME
26
R/W
W
R/W
R/W
R/W
R/W
READ/WRITE
0
0
0
0
0
0
CY7C955
DEFAULT