DJLXT972ALC.A4 Cortina Systems Inc, DJLXT972ALC.A4 Datasheet - Page 18

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DJLXT972ALC.A4

Manufacturer Part Number
DJLXT972ALC.A4
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of DJLXT972ALC.A4

Lead Free Status / RoHS Status
Not Compliant
LXT972A PHY
Datasheet
249186, Revision 5.2
13 September 2007
Table 9
Cortina Systems
LXT972A: Configuration and LED Driver Signal Descriptions
®
Note:
LXT972A Single-Port 10/100 Mbps PHY Transceiver
LQFP
Pin#
17
33
39
38
37
36
5
6
4
1
2
Implement 10 kΩ pull-up/pull-down resistors if LEDs are not used in the design.
REFCLK/XI
LED/CFG1
LED/CFG2
LED/CFG3
PWRDWN
TxSLEW0
TxSLEW1
RESET_L
Symbol
PAUSE
RBIAS
XO
Type
I and
I/O
AI
O
I
I
I
I
Tx Output Slew Controls 0 and 1.
These pins select the TX output slew rate (rise and fall time) as follows:
Reset.
This active Low input is ORed with the control register Reset bit (register
bit 0.15). The PHY reset cycle is extended to 258 μs (nominal) after reset
is de-asserted.
Reference Current Bias.
This pin provides bias current for the internal circuitry. Must be tied to
ground through a 22.1 kΩ, 1% resistor.
Pause.
When set High, the PHY advertises Pause capabilities during auto-
negotiation.
Power Down.
When set High, this pin puts the PHY in a power-down mode.
Reference Clock Input / Crystal Input and Crystal Output.
A 25 MHz crystal oscillator circuit can be connected across XI and XO. A
clock can also be used at XI. Refer to
Requirements, on page 26
LED Drivers 1-3.
These pins drive LED indicators. Each LED can display one of several
available status conditions as selected by the LED Configuration
Register. (For details, see
Address 20, Hex 14, on page
Configuration Inputs 1-3.
These pins also provide initial configuration settings. (For details, see
Table 13, Hardware Configuration Settings, on page
TxSLEW1
0
0
1
1
TxSLEW0
Signal Description
Table 53, LED Configuration Register -
in the Functional Description section.
76.)
0
1
0
1
Section 5.3.2, Clock
4.0 Signal Descriptions
Slew Rate (Rise and Fall
28.)
3.0 ns
3.4 ns
3.9 ns
4.4 ns
Time)
Page 18

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