DJLXT972ALC.A4 Cortina Systems Inc, DJLXT972ALC.A4 Datasheet - Page 25

• Manufacturer Part Number: DJLXT972ALC.A4
• Manufacturer: Cortina Systems Inc

Specifications of DJLXT972ALC.A4

• Lead Free Status / RoHS Status: Not Compliant

LXT972A PHY
Datasheet
249186, Revision 5.2
13 September 2007
Figure 5
5.2.3.1.4
5.2.3.2
5.3
5.3.1
Cortina Systems
MII Interrupt Logic
MII Status Change Register
MII status change is indicated in Register 19 by any of the following four conditions:
Hardware Control Interface
The LXT972A PHY provides a Hardware Control Interface for applications where the
MDIO is not desired. The Hardware Control Interface uses the hardware configuration
pins to set device configuration.
Settings, on page 28.
Operating Requirements
Power Requirements
The LXT972A PHY requires three power supply inputs:
®
• Register 19 provides the interrupt status.
• Auto-negotiation complete
• Speed status change
• Duplex status change
• Link status change
• VCCA
• VCCD
• VCCIO
LXT972A Single-Port 10/100 Mbps PHY Transceiver
Even X Status Reg
Even X Mask Reg
indicates a status change on the LXT972A PHY. Interrupts may be caused by any of
the following four conditions:
— Auto-negotiation complete
— Speed status change
— Duplex status change
— Link status change
Force Interrupt
For details, see Section 5.4.4, Hardware Configuration
AND
OR
Interrupt Enable
NAND
5.3 Operating Requirements
Interrupt Pin
MDINT_L
B3474-01
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