PIC16F726-E/SO Microchip Technology, PIC16F726-E/SO Datasheet - Page 136

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PIC16F726-E/SO

Manufacturer Part Number
PIC16F726-E/SO
Description
14KB Flash Program, 1.8V-5.5V, 16MHz Internal Oscillator, 8b ADC, CCP, I2C/SPI,
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr

Specifications of PIC16F726-E/SO

Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
PIC16F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
3
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 11 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164112 - VOLTAGE LIMITER MPLAB ICD2 VPPICE2000 - EMULATOR MPLAB-ICE 2000 POD
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
PIC16F72X/PIC16LF72X
REGISTER 15-1:
DS41341E-page 136
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
Note 1: A/D conversion start feature is available only on CCP2.
U-0
Unimplemented: Read as ‘0’
DCxB<1:0>: PWM Duty Cycle Least Significant bits
Capture mode:
Unused
Compare mode:
Unused
PWM mode:
These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found in CCPRxL.
CCPxM<3:0>: CCP Mode Select bits
0000 = Capture/Compare/PWM off (resets CCP module)
0001 = Unused (reserved)
0010 = Compare mode, toggle output on match (CCPxIF bit of the PIRx register is set)
0011 = Unused (reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set output on match (CCPxIF bit of the PIRx register is set)
1001 = Compare mode, clear output on match (CCPxIF bit of the PIRx register is set)
1010 = Compare mode, generate software interrupt on match (CCPxIF bit is set of the PIRx register,
1011 = Compare mode, trigger special event (CCPxIF bit of the PIRx register is set, TMR1 is reset
11xx = PWM mode.
U-0
CCPxCON: CCPx CONTROL REGISTER
CCPx pin is unaffected)
and A/D conversion
W = Writable bit
‘1’ = Bit is set
DCxB1
R/W-0
(1)
is started if the ADC module is enabled. CCPx pin is unaffected.)
DCxB0
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CCPxM3
R/W-0
CCPxM2
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
CCPxM1
R/W-0
CCPxM0
R/W-0
bit 0

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